Stacked LCOS Backplane and Driver Substrates for Lower Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current LCOS display devices have poor form factor and high power consumption, imposing undesirable design constraints and low performance characteristics on hosting devices.
Innovation Solution
The design incorporates multiple stacked circuit substrates with different voltage requirements and synergistic functionality, including conductive vias and chip-scale packaging, to reduce size and improve energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If current LCOS display devices use traditional single-substrate architecture, then the device structure is simple, but the form factor is poor and power consumption is high
Solution Approach 1:
The patent divides the circuit substrate into multiple separate substrates (first circuit substrate with pixel mirrors, second circuit substrate with driver circuits) that are stacked and connected via conductive vias. This segmentation allows each substrate to be optimized for its specific function and enables independent voltage control, thereby reducing overall power consumption while improving form factor.
Solution Approach 2:
The patent transitions from a planar single-substrate architecture to a three-dimensional stacked architecture. By stacking multiple circuit substrates vertically and connecting them through conductive vias, the design achieves better form factor and reduced power consumption while managing complexity through vertical integration rather than horizontal expansion.
2Area of stationary object
If multiple stacked circuit substrates are used, then form factor is improved and power consumption is reduced, but manufacturing complexity increases
Solution Approach 1:
By segmenting the circuit substrate into separate functional substrates (display substrate with pixel mirrors and driver substrate with control circuits), each can be manufactured independently using optimized processes, then assembled together. This reduces manufacturing complexity compared to creating a single complex substrate while achieving superior form factor.
Solution Approach 2:
The patent introduces conductive vias as intermediary structures that electrically connect the stacked substrates. These vias serve as the mediation mechanism between layers, enabling electrical interconnection while simplifying the overall manufacturing process by providing a standardized connection interface between substrates.
3Adaptability or versatility
If circuit substrates with different voltage requirements are stacked, then synergistic functionality is achieved, but electrical connection complexity increases
Solution Approach 1:
The patent segments the electrical connection system into discrete conductive vias that connect corresponding pads between stacked substrates. This segmentation allows different voltage domains to be independently managed while achieving synergistic functionality through the stacked architecture, reducing overall electrical connection complexity.
Solution Approach 2:
The patent implements voltage domain isolation where each circuit substrate operates at its own optimized voltage level. The conductive vias provide controlled electrical connections between substrates, allowing different voltage requirements to coexist without creating complex inter-voltage conflicts, thus achieving synergistic functionality with manageable electrical connections.
Data Source
AI summary
An example liquid crystal display device includes a reflective display backplane and one or more integrated circuit substrates arranged in a stacked configuration. The reflective display backplane includes an array of reflective pixel mirrors and a corresponding array of data latches. The top face of one integrated circuit substrate is connected to the back side of the reflective display backplane and is configured as a display driver, providing control signals to the reflective display backplane using a set of through-silicon-vias. Optionally, another integrated circuit substrate is connected (face-to-back) to the one integrated circuit substrate and is configured to provide virtual reality, augmented reality, and/or other video processing support to the display driver. An example embodiment is provided with a chip-scale-package structure formed on the bottom integrated circuit substrate of the stack.