Stacked Leadframe Routing Circuit for Semiconductor Package Interconnects
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Solution Overview
Problem
The increasing semiconductor circuit density poses interconnect challenges for the thermal, mechanical, and electrical integrity of packaged chips, necessitating improved routing capabilities in semiconductor packages.
Innovation Solution
A semiconductor package is manufactured with an internal routing circuit formed from multiple leadframe routing layers, where unwanted areas are removed to create conductive paths on each leadframe layer, including a base copper leadframe routing layer, a top copper leadframe routing layer, and optional intermediary layers, with electrical connections between them using solder paste or spot welding, and encapsulated with insulation layers to expose package terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple stacked leadframes are used to increase routing capabilities, then the internal routing capabilities and electrical communication reliability are improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the routing function into multiple separate leadframe layers (base leadframe, intermediate leadframes, top leadframe), each handling specific routing tasks. This segmentation allows complex electrical communication paths to be broken down into manageable segments across multiple layers, improving reliability while organizing complexity systematically
Solution Approach 2:
The patent transitions from planar routing to three-dimensional stacked routing by adding the vertical dimension with multiple leadframe layers. This dimensional change enables additional routing paths and connectivity options without increasing the footprint, thereby improving electrical communication reliability while distributing complexity across multiple dimensions
2Reliability
If multiple stacked leadframes are used to enhance routing capabilities, then the thermal and mechanical integrity are improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent segments the thermal and mechanical support function across multiple leadframe layers, with each layer contributing to overall structural integrity. The base leadframe provides foundational support while intermediate and top leadframes add distributed reinforcement, improving thermal conduction paths and mechanical strength without concentrating stress or heat in a single layer
Solution Approach 2:
The patent employs composite construction by stacking multiple leadframe materials and combining them with die attach materials, mold compound, and wire bonds. This composite approach creates a multi-material structure that optimizes both thermal conduction and mechanical properties across different layers, enhancing overall reliability while distributing manufacturing precision requirements across multiple material interfaces
3Adaptability or versatility
If multiple stacked leadframes are used to improve internal routing, then the routing capabilities are enhanced, but the ease of manufacture decreases
Solution Approach 1:
The patent applies preliminary action by pre-configuring each leadframe layer with its specific routing patterns and connection points before stacking. The base leadframe is prepared with bottom-side connections, intermediate leadframes are pre-routed with through-holes and connection pads, and the top leadframe is configured with die connection points. This preliminary preparation of each layer simplifies the overall assembly process while enabling complex routing capabilities
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the internal routing capabilities, ensuring reliable electrical communication from die terminals to package terminals, improving the thermal, mechanical, and electrical integrity of semiconductor packages.
Implementation Method 1
The internal routing circuit is formed from multiple leadframe routing layers in a plated and etched copper terminal semiconductor package by removing unwanted areas of each leadframe to create conductive paths on an associated leadframe layer
Implementation Method 2
electrical connections between them using solder paste or spot welding
Implementation Method 3
electrical connections between them using solder paste or spot welding
Data Source
AI summary
Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple leadframe routing layers in a plated and etched copper terminal semiconductor package by removing unwanted areas of each leadframe to create conductive paths on an associated leadframe layer of the semiconductor package.


