Stacked LED Chip Package for Easier Micro-LED Transfer

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Solution Overview

Problem

The challenge in manufacturing micro-LED displays lies in the complexity and time required for mounting hundreds of thousands or millions of individual LED chips, due to their small size and vulnerable structure, which complicates handling and transfer processes, and results in a large area requirement for each pixel, affecting brightness and color purity.

Innovation Solution

A light emitting chip with a stacked structure is developed, featuring a passivation layer and connection electrodes that cover the sides of the LED sub-units, allowing for easier handling and transfer, and removing the growth substrate to enhance light efficacy and color purity by reducing the substrate's impact on light emission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If individual micro-LED chips are used for each sub-pixel, then color display capability is improved, but the number of chips required increases significantly, making the mounting process complex and time-consuming

Engineering Contradiction:
Improvecolor display capabilityVSAvoidmounting process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple LED sub-units (first, second, and third LED sub-units emitting different colors) into a single integrated light emitting chip. This merging approach maintains the color display capability of having multiple sub-pixels while reducing the total number of chips that need to be mounted, thereby simplifying the mounting process and reducing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a two-dimensional arrangement of multiple separate chips to a three-dimensional stacked structure where LED sub-units are vertically stacked. This dimensional change allows multiple color-emitting elements to be integrated into a single chip volume, reducing the number of chips required for mounting while maintaining full color display capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple separate LED chips are arranged on a two-dimensional plane, then color display is achieved, but the area required per pixel increases, reducing luminous area and brightness

Engineering Contradiction:
Improvecolor display capabilityVSAvoidpixel area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent employs a three-dimensional stacked structure where multiple LED sub-units are arranged vertically rather than horizontally. This vertical stacking enables color display functionality within a compact footprint, significantly reducing the pixel area compared to two-dimensional arrangements while maintaining the luminous area and brightness of each sub-pixel.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent nests multiple LED sub-units within a single chip structure, with each sub-unit containing different color-emitting elements. This nesting approach allows multiple color-displaying components to occupy the same spatial footprint, reducing the overall pixel area while preserving full color display capability.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Productivity

If micro-LED chips are cut and transferred individually, then array formation is achieved, but handling becomes difficult due to small size and vulnerable structure

Engineering Contradiction:
Improvearray formation capabilityVSAvoidhandling ease
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent merges multiple LED sub-units into a single integrated chip with a unified structure including shared electrodes and encapsulation. This consolidation creates a more robust handling unit that is less vulnerable than individual micro-LED chips, while still enabling array formation through standard transfer techniques.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent incorporates protective encapsulation layers (first and second encapsulation layers) and passivation structures before the transfer process. These protective elements cushion and protect the vulnerable LED sub-units during handling and transfer operations, making the chips easier to manipulate without damage while maintaining array formation capability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Strength

If substrate is retained in the light emitting structure, then structural support is provided, but light efficacy and color purity are reduced

Engineering Contradiction:
Improvestructural supportVSAvoidlight efficacy
Core Design Contradiction:
StrengthVSIllumination intensity

Solution Approach 1:

The patent extracts and removes the substrate from the final light emitting structure after the LED sub-units are formed and connected. This extraction eliminates the substrate's interference with light emission, thereby improving light efficacy and color purity. The structural support function is maintained through alternative means such as encapsulation layers and electrode structures that do not interfere with light output.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20230387178A1LED chip package and manufacturing method of the same
Publication Date: 2023.11.30 SEOUL VIOSYS CO LTD
  • US20230387178A1 patent drawing
  • US20230387178A1 patent drawing
  • US20230387178A1 patent drawing

AI summary

A light emitting module including a substrate, a first light emitter, a second light emitter, and a third light emitter, in which at least two of the first, second, and third emitters are disposed one over another, connection electrodes electrically connected to at least one of the first, second, and third light emitters, a passivation layer covering at least one side surface of the connection electrodes and exposing at least a region of the first light emitter, and a first electrode electrically connected to at least one of the connection electrodes, in which the first electrode is electrically connected to at least one of the first, second, and third electrodes through the at least one of the connection electrodes, and at least one of connection electrodes overlaps side surfaces of two or more of the first, second, and third light emitters in a plan view.