Stacked RGB LED Pixel Structure for Compact Micro-Display Bonding
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Solution Overview
Problem
The current pixel structure of light-emitting diodes (LEDs) faces challenges in achieving small spacing, large light-emitting area, high process yield, and low cost due to the high aspect ratio and complex bonding and wiring processes, which hinder further reduction in thickness and size.
Innovation Solution
A pixel structure is designed with two mini or micro LED chips stacked side by side on a top surface, incorporating a passivation layer and multiple circuit layers, and a distributed Bragg reflector to enhance luminous efficiency, while eliminating native substrates where applicable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness and size of light-emitting diodes are reduced, then the pixel structure achieves smaller dimensions, but the aspect ratio increases and manufacturing complexity increases
Solution Approach 1:
The patent divides the pixel structure into three separate light-emitting diode chips (first, second, and third LED chips) with different colors, which are stacked vertically. This segmentation allows each chip to be manufactured independently with optimized dimensions, avoiding the need to reduce the size of a single large chip while maintaining overall pixel compactness.
Solution Approach 2:
The patent transitions from a planar arrangement of LED chips to a three-dimensional stacked configuration. By arranging the first, second, and third LED chips vertically on the substrate, the design achieves higher integration density without increasing the horizontal footprint, thereby reducing pixel structure size while maintaining manufacturability.
2Volume of moving object
If the thickness and size of light-emitting diodes are reduced, then the pixel structure achieves smaller dimensions, but the aspect ratio increases and manufacturing complexity increases
Solution Approach 1:
By segmenting the pixel into three separate LED chips stacked vertically, each chip can be bonded to the substrate and to each other at different stages of the manufacturing process. This segmentation reduces the precision requirements for single-step bonding of large chips while achieving compact pixel dimensions.
Solution Approach 2:
The patent employs preliminary bonding actions where the first LED chip is bonded to the substrate first, followed by the second LED chip, and then the third LED chip. This sequential preliminary bonding approach allows each bonding step to be performed with optimized precision requirements, rather than attempting to bond all chips simultaneously with high precision.
3Area of stationary object
If three light-emitting diode chips are stacked vertically, then the light-emitting area increases, but the wiring process complexity increases
Solution Approach 1:
The patent merges the electrical connections by bonding the first, second, and third LED chips directly to each other in a stacked configuration. This merging of chips and their associated wiring reduces the overall wiring complexity compared to separate planar connections, as the vertical stacking allows for integrated electrical interconnections between adjacent chips.
Solution Approach 2:
By moving the wiring connections from a two-dimensional planar layout to a three-dimensional vertical stacking arrangement, the patent reduces wiring complexity. The vertical bonds between chips provide direct electrical connections, eliminating the need for extensive lateral wiring traces and reducing the overall wiring process complexity.
4Ease of manufacture
If native substrates are eliminated, then the manufacturing process is simplified and cost is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent extracts and eliminates the native substrates from the LED chip structure, bonding the LED chips directly to a common substrate. This extraction simplifies the manufacturing process by removing the substrate removal and transfer steps, while the direct bonding approach maintains precision requirements at manageable levels through optimized bonding processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the pixel structure's volume, simplifies manufacturing processes, increases the light-emitting area, and lowers costs, while improving luminous efficiency through the use of a distributed Bragg reflector.
Implementation Method 1
incorporating a passivation layer and multiple circuit layers, and a distributed Bragg reflector to enhance luminous efficiency
Data Source
AI summary
A light-emitting diode device including a pixel structure including first, second and third light-emitting diode chips, a passivation layer, and first, second, third and fourth circuit layers is provided. The first and second light-emitting diode chips are positioned on a top surface opposite to a light-emitting surface of the third light-emitting diode chip. First and second vertical projections of the first and second light-emitting diode chips on the top surface do not overlap each other. First and second bonding surfaces of the first and second circuit layers corresponding to openings in the passivation layer are positioned to overlap the first vertical projection and are separated from the second vertical projection. Third and fourth bonding surfaces of the third and fourth circuit layers that correspond to openings in the passivation layer are positioned to overlap the second vertical projection and are separated from the first vertical projection.