Stacked LED Sub-Pixel Structure for Dense Full-Color Displays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing LED displays face challenges in efficiently arranging sub-pixels for blue, green, and red light within a restricted area, leading to increased chip count, mounting time, and reduced luminous area, which affects production yield and efficiency.
Innovation Solution
A light emitting device with a stacked structure of LED stacks, including first, second, and third LED stacks, interconnected via buried vias and transparent electrodes, allowing for efficient arrangement and increased sub-pixel area without reducing chip size, and incorporating planarization layers for improved manufacturing stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If individual LED chips are arranged in each sub-pixel on a two-dimensional plane, then the display can show various colors, but the number of LED chips increases and the mounting time becomes excessive
Solution Approach 1:
The patent transitions from a two-dimensional arrangement of individual LED chips to a three-dimensional stacked structure where multiple LED chips are vertically arranged. This dimensional change allows multiple LEDs to occupy a smaller planar footprint, reducing the number of mounting positions required while maintaining full color display capability through the stack configuration.
Solution Approach 2:
The patent combines multiple LED chips into a single stacked unit that functions as one integrated component. By merging several LEDs (red, green, blue, and yellow chips) into a vertical stack with shared mounting infrastructure, the system reduces the total number of separate mounting operations required compared to arranging individual chips in a two-dimensional layout.
2Productivity
If the area of each LED chip is reduced to fit more sub-pixels in a restricted area, then more sub-pixels can be arranged, but the mounting becomes more difficult and luminous area decreases
Solution Approach 1:
The patent resolves the contradiction by moving from horizontal scaling (reducing chip size to fit more) to vertical stacking (arranging chips in three dimensions). This allows a larger effective luminous area per sub-pixel while maintaining high pixel density, as the stacked configuration consolidates multiple LEDs into a compact vertical structure that is easier to mount as a single unit.
3Productivity
If the area of each LED chip is reduced, then more sub-pixels can be arranged in restricted space, but the luminous area of each LED chip is reduced
Solution Approach 1:
The patent achieves high sub-pixel density while maintaining large luminous area by transitioning to a three-dimensional stacked architecture. The vertical stacking allows each LED chip in the stack to maintain its full luminous area without being constrained by two-dimensional space limitations, as multiple chips are arranged vertically rather than being compressed horizontally.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances production yield and reduces mounting time while maintaining luminous area, improving the efficiency and reliability of LED displays.
Implementation Method 1
Light emitting diodes have been used in various fields including displays... Since LEDs can emit various colors depending upon materials thereof
Data Source
AI summary
A light emitting module including a circuit board and a lighting emitting device thereon and including first, second, and third LED stacks each including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, a first planarization layer between the second bonding layer and the third LED stack, a second planarization layer on the first LED stack, a lower conductive material extending along sides of the first planarization layer, the second LED stack, the first bonding layer, and electrically connected to the first conductivity type semiconductor layers of each LED stack, respectively, and an upper conductive material between the circuit board and the lower conductive material.