Stacked Mask Spacer Layer Depth of Focus Extension
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Solution Overview
Problem
The depth of focus (DOF) in optical lithography systems is insufficient to support the increasing complexity of semiconductor manufacturing, particularly due to scaling down of feature sizes, which affects resist film thickness, wafer flatness, and planarization tolerance.
Innovation Solution
The implementation of a stacked mask with a low thermal expansion material substrate, absorber layers, and spacer layers in an optical lithography system, generating multiple image planes within the DOF range to improve focusing and leveling accuracy, comprising a method of depositing and patterning absorber and spacer layers to create staged mask patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the feature size is scaled down to improve resolution, then the resolution of the optical lithography system is improved, but the depth of focus (DOF) is decreased
Solution Approach 1:
The patent introduces a vertical dimension to the mask structure by stacking multiple absorber layers at different heights. This three-dimensional configuration allows different layers to focus light at different depths, effectively extending the depth of focus range while maintaining high resolution. The mask structure transitions from a traditional two-dimensional plane to a three-dimensional stacked architecture, enabling simultaneous focus across multiple image planes.
Solution Approach 2:
The mask is divided into multiple separate absorber layers (first absorber layer, second absorber layer, etc.) spaced at different heights from the substrate. Each layer segment independently contributes to forming an image plane at a specific depth. This segmentation allows the system to address different depth requirements separately, with each layer optimized for its specific focal plane, thereby solving the DOF limitation.
2Manufacturing precision
If the resist film thickness and wafer flatness variations increase due to scaling, then more complex processing is needed, but the depth of focus becomes insufficient to support these variations
Solution Approach 1:
By adding the vertical dimension through stacked absorber layers at different heights, the system creates multiple image planes that can accommodate variations in wafer flatness and resist thickness. This dimensional approach provides a larger DOF budget without requiring additional processing steps, thereby reducing processing complexity while improving manufacturing precision.
Solution Approach 2:
The patent changes the structural parameters of the mask by introducing multiple absorber layers with different thicknesses and spacing distances. These parameter variations allow the system to optimize focus for different depth positions, accommodating wafer flatness and resist thickness variations within the extended DOF range without increasing processing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the depth of focus, allowing for more precise image transfer and improved manufacturing capabilities in semiconductor processing by maintaining focus and leveling accuracy across varying topography features.
Implementation Method 1
a spacer layer separating the first absorber layer and the second absorber layer, wherein the spacer layer spaced the first absorber layer and the second absorber layer apart from each other by a distance that is approximate equal to a height of a topography feature on a wafer substrate multiplied by a square of a demagnification of an objective lens
Data Source
AI summary
The present disclosure describes a mask. The mask includes a low thermal expansion material (LTEM) substrate, at least two absorber layers, and a spacer layer separating the two absorber layers. The first absorber layer is deposited over the LTEM substrate. The mask further includes a topcoat layer over the absorber layer. A thickness of the spacer layer is approximately equal to a height of a topography feature on a wafer substrate multiplied by the square of a demagnification of an objective lens. The absorber layers include staged patterns.