3D Stacked MEA-CMOS Architecture for High Electrode Density
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Solution Overview
Problem
Existing microelectrode arrays (MEAs) face complexity in signal transmission as the number of microelectrodes increases, leading to complex connectors and high manufacturing costs, with limited electrode counts and a short lifespan due to degradation when interfacing with biological fluids and semiconductor materials.
Innovation Solution
A 3D stacked platform integrating a microelectrode array (MEA) chip with embedded multiplexer logic and a reusable CMOS chip, allowing for separable components, increased electrode density, and efficient signal processing, including computational analysis and odorant detection, with the MEA chip being disposable and replaceable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of microelectrodes is increased to enhance signal recording capability, then the electrode count and signal processing capacity improve, but the connector complexity and manufacturing costs increase significantly
Solution Approach 1:
The system is divided into two separable components: a disposable MEA chip containing the microelectrode array and a reusable CMOS chip containing the processing electronics. This segmentation allows the MEA chip to be replaced independently when degraded, while the expensive CMOS chip is reused, thereby managing connector complexity and manufacturing costs while supporting high electrode counts.
Solution Approach 2:
The patent transitions from a planar integration approach to a three-dimensional stacked architecture where the MEA chip is positioned above the CMOS chip with vertical interconnections. This dimensional change reduces the footprint and simplifies the connector interface while enabling high-density electrode arrays with thousands of electrodes.
2Reliability
If the MEA chip is integrated with the CMOS chip to improve signal transmission efficiency, then the signal processing performance improves, but the manufacturing cost and device complexity increase
Solution Approach 1:
The system separates the MEA chip and CMOS chip into distinct, separable components while maintaining efficient signal transmission through direct vertical stacking and minimal interconnection distance. This segmentation allows independent optimization of each component and simplifies manufacturing and replacement procedures.
Solution Approach 2:
The patent introduces an intermediary interface layer with electrical pins and bonding pads that facilitates efficient signal transmission between the MEA chip and CMOS chip. This intermediary structure enables reliable electrical connections while maintaining the separability of the two components.
3Duration of action of stationary object
If the MEA chip is made disposable to extend device lifespan by replacing degraded components, then the operational lifespan is extended, but the manufacturing cost per unit increases
Solution Approach 1:
The system is segmented into a disposable MEA chip and a reusable CMOS chip. The MEA chip, which degrades due to exposure to biological fluids, is designed as a low-cost disposable component that can be replaced independently. The expensive CMOS chip with complex electronics is reused across multiple MEA chips, thereby extending the overall device lifespan while controlling manufacturing costs.
Solution Approach 2:
The MEA chip is designed as a cheap, disposable component that is replaced when degraded, while the expensive CMOS chip is reused. This approach extends the operational lifespan of the overall system by allowing continuous replacement of the consumable MEA chip without replacing the entire device.
4Ease of manufacture
If connectors are simplified to reduce manufacturing cost, then the manufacturing cost decreases, but the number of electrodes must be limited
Solution Approach 1:
The patent employs a three-dimensional stacked architecture where the MEA chip is positioned vertically above the CMOS chip, enabling high-density electrode arrays with thousands of electrodes through vertical interconnections rather than planar routing. This dimensional change simplifies the connector interface while supporting high electrode counts.
Solution Approach 2:
By segmenting the system into separable MEA and CMOS chips with standardized interfaces, the patent enables simplified manufacturing of each component independently while supporting high electrode counts through the modular architecture. The standardized connector interface reduces complexity despite the high number of electrodes.
Data Source
AI summary
Provided herein is a system comprising (1) a microelectrode array (MEA) component comprising an integrated multiplexed (MUX) logic circuit; and (2) a microprocessor, e.g., MOSFET, such as a CMOS, wherein the MEA is in electrical communication with the microprocessor such that signals produced by the microelectrodes are transmitted to the processor through the MUX. The use of a MUX reduces the number of outputs used to communicate signals from multiple microelectrodes to the microprocessor. The two components are removably engageable with each other such that after one or more uses, the engaged MEA can be removed and replaced with a new MEA, without the necessity of disposing the microprocessor.