Stacked Memory Package Buffer Cap for Warpage and Joint Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in achieving smaller, higher-speed, and lower-power semiconductor devices due to the need for advanced packaging techniques as integration density increases, particularly in stacked semiconductor devices like 3DICs, where reliability and warpage control are critical.

Innovation Solution

A method for fabricating high bandwidth memory (HBM) devices involves stacking memory dies with conductive terminals and using a gap filling material to enhance mechanical and electrical connections, followed by encapsulation to improve reliability and reduce joint failure, while employing buffer material layers for protection and planarization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If multiple semiconductor dies are stacked to increase integration density, then the physical size is reduced, but warpage control and reliability become more difficult

Engineering Contradiction:
Improvephysical sizeVSAvoidjoint failure risk
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

An underfill material is introduced as an intermediary substance between the stacked semiconductor dies and the substrate. This underfill material fills the gaps and spaces in the stacked structure, providing mechanical support and reducing warpage. The underfill acts as a mediator that distributes stress evenly across the stacked dies, thereby improving reliability and reducing joint failure risk while maintaining the compact physical size.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Volume of moving object

If multiple semiconductor dies are stacked to increase integration density, then the physical size is reduced, but warpage control becomes more difficult

Engineering Contradiction:
Improvephysical sizeVSAvoidwarpage control
Core Design Contradiction:
Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The underfill material serves as a stabilizing intermediary that fills the voids between stacked dies and the substrate. It provides mechanical reinforcement and distributes thermal and mechanical stresses, preventing warpage deformation. This allows the compact stacked structure to maintain dimensional stability and structural integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional packaging techniques are used, then manufacturing is simpler, but reliability and warpage control are insufficient for advanced devices

Engineering Contradiction:
Improvepackaging process simplicityVSAvoiddevice performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The underfill material is applied in advance to the substrate before the stacked semiconductor dies are mounted. This preliminary action ensures that the underfill is already in position to provide mechanical support and stress distribution. The process includes forming the underfill layer, curing it, and then mounting the stacked dies, which simplifies the overall packaging process while improving reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12512419B2Method of fabricating memory device and package structure
Publication Date: 2025.12.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12512419B2 patent drawing
  • US12512419B2 patent drawing
  • US12512419B2 patent drawing

AI summary

A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.