Stacked Memory Card Architecture for Capacity and Endurance
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Solution Overview
Problem
Memory cards face a trade-off between increasing capacity and maintaining endurance and operation speed, with higher capacity often leading to decreased endurance and speed.
Innovation Solution
A memory card design featuring a stacked chip configuration with a base memory chip, an additional memory chip, a frequency boosting interface chip, and a controller chip, which are electrically connected to enhance both capacity and performance by using advanced data storage methods like TLC, MLC, or SLC, and by optimizing the connection and arrangement of components for improved heat dissipation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacity of memory cards is increased, then the storage capability is improved, but the endurance and operation speed decrease
Solution Approach 1:
The memory card is divided into multiple independent memory chips (first memory chip, second memory chip, third memory chip) with different storage capacities. This segmentation allows the system to achieve high total capacity while maintaining good endurance characteristics of individual chips, resolving the contradiction between capacity and reliability.
Solution Approach 2:
Different memory chips are assigned different storage capacities based on their endurance characteristics. The controller selectively manages data storage across chips with varying local qualities (capacity and endurance), optimizing overall system performance by matching data types to appropriate storage locations.
2Quantity of substance
If the capacity of memory cards is increased, then the storage capability is improved, but the operation speed decreases
Solution Approach 1:
The memory storage function is segmented across multiple independent chips, allowing parallel data operations. The controller can simultaneously access different chips for different data operations, maintaining high operation speed even as total capacity increases.
Solution Approach 2:
The patent transitions from a single-dimension storage architecture to a multi-dimensional architecture by stacking memory chips in the vertical direction. This spatial reorganization enables parallel access paths and maintains operation speed while increasing total storage capacity.
3Quantity of substance
If multiple memory chips are stacked to increase capacity, then the storage capability is improved, but the heat dissipation becomes more difficult
Solution Approach 1:
Memory chips are arranged in a vertical stacked configuration rather than a horizontal layout. This three-dimensional arrangement increases storage capacity within a compact footprint while improving heat dissipation by exposing more chip surfaces to ambient air for thermal management.
Solution Approach 2:
The memory chips are arranged asymmetrically in a staircase-like pattern rather than a symmetric stacked configuration. This asymmetric arrangement creates optimal air flow paths and thermal gradients, enhancing heat dissipation efficiency while maintaining high storage capacity.
Data Source
AI summary
A memory card includes an upper case, a lower case, and an integrated circuit package between the upper case and the lower case. The integrated circuit package includes a memory stacked chip on a panel substrate, and the memory stacked chip includes a base memory stacked chip and an additional memory stacked chip stacked on the base memory stacked chip. The integrated circuit package includes a frequency boosting interface chip on the panel substrate and electrically connected to the memory stacked chip, and a controller chip on the panel substrate and electrically connected to the memory stacked chip and the frequency boosting interface chip.