Stacked Memory Die Identifier Circuits for Unique Chip IDs

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Solution Overview

Problem

Conflicts arise during the manufacturing of three-dimensional memory stacks due to identical chip identifiers assigned before stacking, leading to issues with memory chips in the stack.

Innovation Solution

A method and semiconductor device that automatically generate unique chip identifiers for semiconductor dies in a stacked structure using identifier generation circuits, where each die's identifier is generated based on an auxiliary input signal and the identifier of the neighboring die below it, utilizing logic gates for logical operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If chip identifiers are set before stacking, then manufacturing process is simplified, but identifier conflicts occur between different memory chips in the stack

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoididentifier uniqueness

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-configuring the identifier generation circuit with the stacking order information during the manufacturing process, before the actual stacking occurs. This allows the circuit to automatically generate unique identifiers based on the predetermined stacking sequence, resolving the conflict between manufacturing simplicity and identifier uniqueness.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The identifier generation circuit is designed to self-generate unique chip identifiers automatically during operation. Each memory chip's identifier circuit uses its own stacking order information and the identifiers of chips below it to generate its unique identifier, eliminating the need for external manual assignment and preventing conflicts.

Inventive Principle:

Principle #25Self-service

2Reliability

If unique identifiers are generated after stacking, then identifier uniqueness is ensured, but manufacturing complexity increases

Engineering Contradiction:

Improveidentifier uniquenessVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the identifier generation function with the existing memory chip structure by integrating the identifier generation circuit directly into each memory chip. This combination allows unique identifiers to be generated after stacking without requiring separate external systems or complex additional manufacturing steps.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces manual or external mechanical identifier assignment with an automated electronic identifier generation system. The identifier generation circuit uses logical operations and electrical signals to automatically create unique identifiers, substituting complex manual processes with simpler electronic automation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If manual identifier assignment is used, then identifier control is precise, but production efficiency decreases

Engineering Contradiction:

Improveidentifier assignment accuracyVSAvoidproduction efficiency

Core Design Contradiction:

Measurement precisionVSProductivity

Solution Approach 1:

The identifier generation circuit performs self-service by automatically generating its own unique identifier without external intervention. Each circuit uses its internal stacking order information and the identifiers of chips below it to autonomously produce its identifier, maintaining precision while enabling high-speed automated production.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent replaces manual identifier assignment with automated electronic generation using logical operations in the identifier generation circuit. This substitution maintains the precision of controlled identifier assignment while dramatically increasing production efficiency through automation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20260026401A1Semiconductor device, memory device, and method for automatically generating chip identifiers for semiconductor dies in stacked structure using logic gates

Publication Date: 2026.01.22 NAN YA TECH

AI summary

A method for automatically generating chip identifier for semiconductor dies in a stacked structure is provided. The method includes the following steps: obtaining a first semiconductor die and a second semiconductor die, wherein the first semiconductor die and the second semiconductor die include a first identifier generation circuit and a second identifier generation circuit, respectively; forming a stacked structure by stacking the second semiconductor die on the first semiconductor die, wherein the first identifier generation circuit is electrically connected to the second identifier generation circuit; and generating a first chip identifier and a second chip identifier for the first semiconductor die and the second semiconductor die by the first identifier generation circuit and the second identifier generation circuit, respectively. The second chip identifier is generated using the first chip identifier and an auxiliary input signal.