Stacked Non-Volatile Memory Dies for Flexible Manufacturing
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Solution Overview
Problem
The manufacturing processes for various types of memory devices require different steps, equipment, and materials, leading to increased costs and inefficiencies.
Innovation Solution
A non-volatile memory device is manufactured by stacking multiple dies, including a memory cell array, row decoder, page buffer circuit, and voltage generator, allowing for the combination and stacking of these components in various ways to create diverse memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different manufacturing processes are used for various memory devices, then each device can be optimized for its specific characteristics, but manufacturing costs increase due to requiring different process steps, equipment, and materials
Solution Approach 1:
The patent implements a universal manufacturing process where a single set of process steps, equipment, and materials can manufacture multiple types of memory devices (e.g., NAND flash, NOR flash, OLED displays). This is achieved by designing memory structures with common architectural elements that can be configured differently to produce various device types, thereby reducing manufacturing costs while maintaining optimized performance for each device category
Solution Approach 2:
The manufacturing process is divided into modular segments that can be independently configured. Key process steps are standardized and can be applied universally, while specific device characteristics are achieved through selective application of certain process modules. This segmentation allows flexible combination of standard processes to create different memory device types without requiring entirely separate manufacturing lines
2Device complexity
If a stacked structure is used to integrate multiple dies, then device complexity is reduced and manufacturing flexibility is improved, but the manufacturing precision requirements increase
Solution Approach 1:
Alignment marks and positioning structures are pre-formed on the dies before stacking. These preliminary features guide the stacking process and ensure precise alignment between layers. By preparing alignment references in advance, the actual stacking operation becomes more straightforward and less prone to precision errors
Solution Approach 2:
The patent introduces intermediary bonding structures and alignment features that facilitate the stacking process. These intermediary elements act as mediators between the different dies, enabling precise positioning and reliable electrical connections while reducing the direct precision requirements between stacked components
Data Source
AI summary
A non-volatile memory device including a memory cell array, a row decoder, a page buffer circuit, a control logic circuit, and a voltage generator includes at least one first die including the memory cell array including a plurality of blocks and the row decoder electrically connected to the memory cell array through a plurality of word lines, at least one second die including the page buffer circuit electrically connected to the memory cell array through a plurality of bit lines, and the control logic circuit configured to control an operation of the row decoder and the page buffer circuit, and a third die including the voltage generator configured to supply voltage to the row decoder and the page buffer circuit. The at least one first die, the at least one second die, and the third die are formed in a stacked structure.