Stacked Semiconductor Memory With Hybrid-Bonded Capacitor and Access Arrays
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Solution Overview
Problem
Existing two-dimensional semiconductor devices face limitations in increasing integration density due to economic and physical constraints, such as the need for expensive high-resolution exposure equipment, which hinders further performance enhancement and cost reduction.
Innovation Solution
The development of a stack type semiconductor memory device that integrates capacitor arrays and access arrays on separate substrates, utilizing hybrid bonding to connect the elements, allowing for increased integration density without the limitations of two-dimensional designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two-dimensional semiconductor device integration is increased, then performance improves, but expensive high-resolution exposure equipment is required
Solution Approach 1:
The patent transitions from two-dimensional planar integration to three-dimensional stack-type integration by bonding multiple substrates vertically. This dimensional change allows continued increase in integration density without requiring further reduction in feature size, thereby avoiding the need for increasingly expensive high-resolution exposure equipment while maintaining manufacturing feasibility
2Device complexity
If capacitor array and access array are integrated on the same substrate, then device complexity is reduced, but thermal burden increases and electrical characteristics deteriorate
Solution Approach 1:
The patent divides the semiconductor device into separate substrate layers: a first substrate containing the capacitor array and a second substrate containing the access array. These substrates are then bonded together through hybrid bonding. This segmentation allows independent optimization of each array's electrical characteristics while reducing thermal burden on any single substrate, thereby improving overall device reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher integration density and improved electrical characteristics by separating the formation of capacitors and transistors on different substrates, reducing thermal burdens and maintaining electrical integrity.
Implementation Method 1
The second bonding layer may be hybrid-bonded to the first bonding layer
Data Source
AI summary
A stack type semiconductor memory device may include a first structure and a second structure. The first structure may include a first substrate, a capacitor array and a first bonding layer. The first substrate may have an upper surface and a lower surface. The capacitor array may include a plurality of capacitors integrated on the upper surface of the first substrate. The first bonding layer may be formed on the capacitor array. The second structure may include a second substrate, an access array and a second bonding layer. The second substrate may have an upper surface and a lower surface. The access array may include a plurality of access transistors integrated on the upper surface of the second substrate. The second bonding layer may be formed on the lower surface of the second substrate. The second bonding layer may be hybrid-bonded to the first bonding layer.