Stacked Memory Micro Channels Dynamic Configuration
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Solution Overview
Problem
Current stacked semiconductor memory devices lack the ability to dynamically vary the number of micro channels accessing memory arrays, which limits flexibility and efficiency in memory access and capacity utilization.
Innovation Solution
A stacked memory device with multiple memory chips connected via through silicon vias (TSVs) and input/output buffer circuits that can select and manage micro channels to access memory arrays, allowing for varying numbers of micro channels and memory banks, enabling flexible data transfer and capacity adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed number of micro channels are used to access memory arrays in stacked memory devices, then the structure is simple and easy to manufacture, but the flexibility and efficiency in memory access and capacity utilization are limited
Solution Approach 1:
The patent implements dynamic micro channel configuration by introducing control circuits that can selectively activate or deactivate micro channels based on memory access requirements. The micro channels are configured to be dynamically adjustable between different operational states, allowing the system to adapt the number of active channels to match the specific memory access patterns and capacity utilization needs, thereby resolving the contradiction between flexibility and structural simplicity.
Solution Approach 2:
The patent changes the operational parameters of micro channels by introducing control signals that can modify the number of active micro channels accessing memory arrays. By varying the parameter of micro channel activation state (on/off or active/inactive), the system achieves flexible memory access capability without permanently altering the physical structure, thus maintaining manufacturing simplicity while gaining adaptability.
2Productivity
If more micro channels are provided to access memory arrays, then data transfer rates improve, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent designs micro channels with multi-functionality, where each micro channel can serve multiple purposes: it can be dynamically activated or deactivated depending on the memory access requirements. This universal design allows the same physical infrastructure to support varying data transfer rates without requiring separate dedicated channels for each rate level, thereby improving productivity while avoiding the manufacturing complexity of building multiple fixed-channel configurations.
3Adaptability or versatility
If the number of micro channels is fixed during manufacturing, then manufacturing precision is easier to control, but the ability to adjust memory capacity and access patterns is reduced
Solution Approach 1:
The patent introduces dynamic configuration capability for micro channels, allowing the number of active channels to be adjusted after manufacturing based on memory capacity requirements. The control circuits enable post-manufacturing adaptability by selectively activating micro channels, eliminating the need for precise pre-determination of channel counts during manufacturing while maintaining ease of manufacturing through standardized channel structures.
Data Source
AI summary
At least one example embodiment discloses a stacked memory device including a plurality of stacked memory chips, each of the memory chips including a memory array, a plurality of through silicon vias (TSVs) operatively connected to the plurality of stacked memory chips, micro channels configured to access the memory arrays and at least one circuit in each memory chip, the at least one circuit configured to vary a number of the micro channels accessing the memory array.