Stacked Memory Package Assembly with Controller-Mediated Interconnects

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Semiconductor electronic products face challenges in scaling down while maintaining electrical characteristics, quality, cost, and yield, as single semiconductor chips struggle to meet multifunctional and high-volume data processing needs.

Innovation Solution

A package structure integrating a molded structure with a memory controller device, interconnection device, and encapsulant, along with logic, volatile, and non-volatile memory devices, connected through conductive structures and encapsulated for enhanced integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor electronic products are scaled down to meet application demands, then device size is reduced, but electrical characteristics and quality deteriorate

Engineering Contradiction:

Improvedevice sizeVSAvoidelectrical characteristics

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent divides the semiconductor system into multiple separate chips (logic chip, memory chips) that are individually manufactured and then integrated through a package structure. This segmentation allows each chip to be optimized for its specific function while maintaining reliable electrical characteristics, avoiding the degradation that would occur if all functions were scaled down in a single chip.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from horizontal integration (single chip) to vertical integration (stacked package structure with multiple chips). By stacking chips vertically and using through-silicon vias (TSVs) for interconnection, the system achieves high integration without scaling down individual chip dimensions, thereby maintaining electrical characteristics while reducing overall device footprint.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple semiconductor chips are integrated to meet multifunctional needs, then functionality is enhanced, but device complexity increases

Engineering Contradiction:

Improvemultifunctional capabilityVSAvoidintegration complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The package structure serves as a universal platform that can accommodate different types of semiconductor chips (logic, volatile memory, non-volatile memory) in standardized configurations. The common package design with standardized interconnection methods enables multifunctional capabilities while managing complexity through reuse of the same structural elements across different applications.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The package structure acts as an intermediary that simplifies the integration of multiple chips. Instead of directly connecting chips to each other in complex configurations, the package provides a standardized interface and routing layer that mediates connections, thereby reducing the overall system complexity while enabling multifunctional integration.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If integration level is enhanced to meet data processing needs, then data processing capability is improved, but manufacturing difficulty increases

Engineering Contradiction:

Improvedata processing capabilityVSAvoidmanufacturing difficulty

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent employs preliminary actions in the manufacturing process by pre-forming through-silicon vias (TSVs) and interconnection structures on the chips before final packaging. The encapsulant is also pre-prepared with embedded conductive structures. These preliminary actions simplify the final assembly process and enable high integration while maintaining ease of manufacture through standardized pre-processing steps.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20260053059A1Package structure including at least two memory devices, assembly structure and method of manufacturing the same

Publication Date: 2026.02.19 NAN YA TECH

AI summary

A package structure, an assembly structure and a manufacturing method are provided. The package structure includes a molded structure, a logic device, a non-volatile memory device and a volatile memory device. The molded structure includes a memory controller device, an interconnection device and an encapsulant encapsulating the memory controller device and the interconnection device. The logic device is electrically connected to the interconnection device. The non-volatile memory device and the volatile memory device are electrically to the logic device through the memory controller device. The volatile memory device is electrically connected to the non-volatile memory device through the memory controller device.