Stacked Memory Package Vertical Interconnects
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Solution Overview
Problem
There is a need to increase memory capacity in flash memory devices without increasing their dimensions and to improve memory device yield, as existing devices often contain inoperative controller chips and have limitations in cost, efficiency, and performance.
Innovation Solution
The solution involves an integrated circuit package system with a base package of a rectangular-box shape containing electrical circuitry, featuring rectangular contact strips and base contact pads for connectivity, allowing for stacking and easy integration with a next-level system, along with a removable device cap for enhanced serviceability and configurability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory capacity is increased by adding more die or expanding package size, then storage capacity improves, but device dimensions increase
Solution Approach 1:
The patent transitions from horizontal expansion (increasing package footprint) to vertical stacking (increasing package height). Multiple packages are stacked in the vertical dimension, with electrical interconnects passing through intermediate substrates to connect die across multiple layers. This allows memory capacity to scale by adding vertical layers rather than expanding horizontal area, directly resolving the contradiction between capacity and footprint.
Solution Approach 2:
The patent implements a nested structure where multiple packages are stacked within a compact footprint. Each package contains die mounted on substrates, and these packages are nested vertically with electrical interconnects threading through intermediate substrates. The nested arrangement allows multiple functional layers to occupy the same horizontal space, increasing capacity without proportionally increasing device dimensions.
2Ease of manufacture
If individual packages are manufactured and tested separately, then manufacturing flexibility improves, but yield decreases due to inoperative controller chips
Solution Approach 1:
The patent performs preliminary testing of individual packages at the package level before final assembly into the stacked configuration. This intermediate testing stage allows defective packages (containing inoperative controller chips) to be identified and removed early in the manufacturing process, preventing them from contaminating the final product. The preliminary action maintains manufacturing flexibility while improving yield by enabling selective assembly of only functional packages.
3Volume of moving object
If LGA package design is used for small form factor, then device profile reduces, but electrical connection reliability may be compromised
Solution Approach 1:
The patent merges the advantages of LGA packages (small footprint, low inductance) with enhanced connection reliability through vertical stacking. Multiple LGA-style packages are stacked with electrical interconnects passing through intermediate substrates, creating redundant connection paths. The merging of vertical stacking with LGA design maintains the compact profile while the multi-layer interconnect structure provides alternative pathways for electrical signals, improving overall connection reliability.
Data Source
AI summary
An integrated circuit package system includes: providing a base package of an elongated rectangular-box shape containing first electrical circuitry and including: forming a rectangular contact strip on and adjacent to a first end of the base package; and forming a base contact pad on and adjacent to a second end of the base package for connection to an electrical interconnect.