3D Stacked Memory Barrier Patterns via Partial Oxidation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration density of semiconductor devices is limited by the area occupied by unit memory cells, and existing technologies face challenges in enhancing operation reliability, particularly in three-dimensional stacked memory cells where charge transfer between cells can occur due to insufficient energy barriers.
Innovation Solution
A semiconductor device structure is developed with alternately stacked conductive and insulating layers, a memory layer, and barrier patterns that include a curved sidewall, where the barrier patterns are formed by partial oxidation of the memory layer without removing the underlying layers, providing an energy barrier to prevent charge transfer between stacked memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked in three dimensions to improve integration density, then the area occupied by unit memory cells is reduced, but charge transfer between stacked cells occurs due to insufficient energy barriers
Solution Approach 1:
The gate structure is segmented into multiple conductive layers separated by insulating layers, creating discrete energy barrier regions between stacked memory cells. This segmentation prevents charge transfer by introducing insulating barriers at each interface, allowing high integration density while maintaining operational reliability through localized charge confinement.
Solution Approach 2:
Insulating layers are introduced as intermediary materials between conductive layers in the gate structure. These intermediary insulating layers act as energy barriers that prevent direct charge transfer between adjacent memory cells stacked in three dimensions, enabling reliable operation while achieving high integration density.
2Ease of manufacture
If barrier patterns are formed by removing second material layers, then the manufacturing process is simpler, but the structural integrity and reliability are compromised
Solution Approach 1:
The manufacturing approach changes from material removal to in-situ oxidation. Barrier patterns are formed by controlling oxidation parameters (temperature, atmosphere, duration) applied to the memory layer through slits, transforming the memory layer material into barrier material without mechanical removal of underlying layers, thus maintaining structural integrity while achieving the desired barrier formation.
Solution Approach 2:
Oxygen serves as an intermediary agent that diffuses through the slits and oxidizes the memory layer material in place. This intermediary oxidation process forms barrier patterns without requiring removal of the second material layers, preserving structural reliability while achieving the barrier function needed for charge isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure improves integration density and reliability by creating an effective energy barrier that reduces charge transfer between memory cells, enhancing the stability and performance of three-dimensional semiconductor devices.
Implementation Method 1
forming first barrier patterns, without removing the second material layers, by partially oxidizing the memory layer through the second material layers
Data Source
AI summary
A method of manufacturing a semiconductor device may include forming a stack with alternately stacked first material layers and second material layers, forming an opening passing through the stack, forming a memory layer in the opening, forming a slit passing through the stack and exposing the first material layers and the second material layers, and forming first barrier patterns, without removing the second material layers, by partially oxidizing the memory layer through the second material layers.