Stacked Memory Power Paths for Stable Voltage Distribution
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Solution Overview
Problem
In stacked memory devices, the common power distribution through a single conductor can lead to degraded performance due to voltage instability, noise, and thermal issues, as current density and voltage drop vary across memory dies, affecting voltage stability and thermal distribution.
Innovation Solution
The implementation of dedicated through-die supply conductors that are electrically isolated from the operating circuitry of each memory die, allowing for improved power distribution with enhanced voltage stability, reduced noise, and favorable current and thermal characteristics by providing isolated power paths through the memory die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common power distribution conductor is shared across multiple memory dies, then device complexity is reduced, but voltage stability deteriorates due to varying current density and voltage drop
Solution Approach 1:
The patent divides the common power distribution conductor into separate dedicated conductors for each memory die. Each memory die receives power through its own isolated conductor path, eliminating the shared conductor issue. This segmentation resolves the voltage stability problem by ensuring each die has a dedicated power path with consistent electrical characteristics, while the overall device complexity remains manageable through systematic implementation.
2Ease of manufacture
If a common power distribution conductor is used, then manufacturing is simplified, but noise increases due to electrical interference from multiple memory dies
Solution Approach 1:
By segmenting the power distribution into separate dedicated conductors for each memory die, the patent isolates electrical noise generated by each die. This prevents noise coupling between adjacent dies that would occur with a shared conductor. The manufacturing process remains straightforward through systematic conductor routing and connection methods.
3Device complexity
If current flows through a shared conductor to multiple memory dies, then power distribution is simplified, but thermal issues worsen due to uneven heat distribution
Solution Approach 1:
The patent implements separate power conductors for each memory die, which distributes current more evenly across the device. This segmentation of power paths ensures that each die receives appropriate current through its own conductor, preventing localized heating issues that would occur with high current density in a shared conductor. The thermal distribution becomes more uniform across the stacked memory device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the performance of memory devices by maintaining stable voltage and reducing noise and thermal stress across memory dies, leading to better overall performance compared to traditional shared power distribution methods.
Implementation Method 1
a conductive path that supports providing power to one or more other memory dies of a stacked memory device, wherein the conductive path passes through the memory die, but is electrically isolated from circuitry for operating the memory die
Data Source
AI summary
Methods, systems, and devices for power distribution for stacked memory are described. A memory die may be configured with one or more conductive paths for providing power to another memory die, where each conductive path may pass through the memory die but may be electrically isolated from circuitry for operating the memory die. Each conductive path may provide an electronic coupling between at least one of a first set of contacts of the memory die (e.g., couplable with a power source) and at least one of a second set of contacts of the memory die (e.g., couplable with another memory die). To support operations of the memory die, a contact of the first set may be coupled with circuitry for operating a memory array of the memory die, and to support operations of another memory die, another contact of the first set may be electrically isolated from the circuitry.