Stacked Memory Redundant Resources Defect Correction
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Solution Overview
Problem
Three-dimensional integrated circuits, such as stacked memory devices, face challenges including yield risks, heat buildup, design complexity, and testing costs, particularly due to the overhead of through-silicon vias (TSVs) and the need for redundant resources to correct defective circuitry.
Innovation Solution
A stacked memory device with redundant resources circuits distributed across multiple semiconductor layers, capable of correcting defective circuitry by using partial memory banks and I/O fields to replace faulty memory banks, reducing production costs through vertical electrical integration and multiplexing of memory circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant resources circuits are added to correct defective circuitry, then reliability is improved, but device complexity increases
Solution Approach 1:
The redundant resources circuit is segmented into multiple partial memory banks distributed across different semiconductor layers. Each layer contains a portion of the redundant resources that can independently replace defective circuits in that layer, enabling localized repair without requiring a complete redundant circuit throughout the entire stack.
Solution Approach 2:
The patent transitions from a planar layout to a three-dimensional stacked architecture where redundant resources are distributed vertically across multiple layers. This dimensional change allows the redundant resources to serve multiple functions across different layers while maintaining a compact form factor and reducing overall complexity compared to traditional single-layer approaches.
2Productivity
If through-silicon vias are used for vertical electrical integration, then productivity is improved, but device complexity increases
Solution Approach 1:
The through-silicon vias serve multiple functions: they provide vertical electrical interconnection between layers, enable signal transmission for memory operations, and facilitate testing and repair operations. By making the TSV infrastructure multi-functional, the patent reduces the need for separate dedicated structures, thereby managing complexity while maintaining high productivity.
3Productivity
If redundant resources circuits are implemented, then yield is improved, but manufacturing cost increases
Solution Approach 1:
Instead of providing complete redundant circuits for every possible defective scenario, the patent implements partial redundant resources in the form of distributed partial memory banks across layers. This partial action approach provides sufficient repair capability for most defects while reducing the overall resource consumption and manufacturing cost compared to full redundancy approaches.
Data Source
AI summary
A memory device includes a stack of circuit layers, each circuit layer having formed thereon a memory circuit configured to store data and a redundant resources circuit configured to provide redundant circuitry to correct defective circuitry on at least one memory circuit formed on at least one layer in the stack. The redundant resources circuit includes a partial bank of redundant memory cells, wherein an aggregation of the partial bank of redundant memory cells in each of the circuit layers of the stack includes at least one full bank of redundant memory cells and wherein the redundant resources circuit is configured to replace at least one defective bank of memory cells formed on any of the circuit layers in the stack with at least a portion of the partial bank of redundant memory cells formed on any of the circuit layers in the stack.