Stacked Nonvolatile Memory Device Select Gate Processing
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Solution Overview
Problem
Conventional nonvolatile semiconductor memory devices face challenges in increasing memory capacity due to limitations in miniaturization, particularly in terms of cost and technological feasibility, and there is a need to enhance productivity in three-dimensional stacked memory structures.
Innovation Solution
A nonvolatile semiconductor memory device is designed with a stacked structure that includes electrode films, interelectrode insulating films, select gate electrodes, and semiconductor pillars, where the select gate electrode is configured as a stacked film of conductive and insulating films, allowing for improved processing conditions and increased productivity by simplifying the patterning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If device elements are miniaturized in a two-dimensional plane to increase memory capacity, then memory capacity increases, but manufacturing cost and technological difficulty increase significantly
Solution Approach 1:
The patent transitions from two-dimensional planar integration to three-dimensional stacked structure, where memory cells are arranged vertically across multiple layers. This dimensional change allows significant increase in memory capacity without requiring further miniaturization of individual elements, thereby avoiding the associated cost and technological difficulties.
Solution Approach 2:
The memory device is divided into multiple stacked layers with insulating films and electrode films alternately arranged. Each layer contains multiple memory cells formed at intersections with silicon pillars, enabling parallel processing and fabrication across segments, which improves manufacturing efficiency.
2Quantity of substance
If three-dimensional stacked memory structure is implemented to increase memory capacity, then memory capacity and productivity improve, but process complexity increases
Solution Approach 1:
The patent merges the formation processes of select gate electrodes and electrode films by using the same stacked film structure and processing conditions for both. This unification reduces the number of distinct process steps and simplifies manufacturing, despite the three-dimensional stacked architecture.
Solution Approach 2:
The stacked film structure serves multiple functions: it forms both the select gate electrodes and the electrode films, and the same film stack is used throughout the memory device. This multi-functionality reduces process complexity by eliminating the need for separate structures and processes for different components.
3Reliability
If different processing conditions are used for select gate electrodes and electrode films, then device performance is optimized, but additional process steps increase and productivity decreases
Solution Approach 1:
The patent combines the processing of select gate electrodes and electrode films into a single unified process using the same stacked film structure. Both types of electrodes are formed simultaneously under identical processing conditions, eliminating additional process steps and improving manufacturing efficiency while maintaining device performance.
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory device includes a stacked structure, a select gate electrode, a semiconductor pillar, a memory layer, and a select gate insulating film. The stacked structure includes a plurality of electrode films stacked in a first direction and an interelectrode insulating film provided between the electrode films. The select gate electrode is stacked with the stacked structure along the first direction and includes a plurality of select gate conductive films stacked in the first direction and an inter-select gate conductive film insulating film provided between the select gate conductive films. The semiconductor pillar pierces the stacked structure and the select gate electrode in the first direction. The memory layer is provided between the electrode films and the semiconductor pillar. The select gate insulating film is provided between the select gate conductive films and the semiconductor pillar.