Stacked Semiconductor Memory Substrates via Interface Connector
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in miniaturization and efficient area utilization, as they are typically mounted on a single substrate, limiting capacity and size reduction when multiple devices are needed on a limited surface area.
Innovation Solution
A semiconductor memory device configuration that includes two substrates with mounted semiconductor devices and an interface connector allowing electrical connection through socket portions and internal wiring, enabling parallel stacking and efficient use of space, with a case to protect and expose the connector for external access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor devices are mounted on two smaller substrates with connectors, then the number of devices that can be mounted is increased, but the area utilization is not efficient and the device complexity increases
Solution Approach 1:
The patent transitions from a planar substrate arrangement to a three-dimensional stacked configuration. Multiple substrates are vertically stacked and connected through through-substrate vias, enabling semiconductor devices to be mounted on multiple layers rather than confined to a single plane. This dimensional change allows increased device quantity without proportionally increasing the footprint area, effectively resolving the contradiction between device density and area utilization.
Solution Approach 2:
The patent implements a nested structure where multiple substrates are stacked one within another, with each substrate containing semiconductor devices and connection terminals. The substrates are interconnected through vertical connection paths that pass through intermediate layers, creating a compact nested arrangement that maximizes space utilization while maintaining electrical connectivity between all device layers.
2Reliability
If connectors are provided for interconnecting substrates, then electrical connection is achieved, but the manufacturing complexity and assembly difficulty increase
Solution Approach 1:
The patent merges the connection terminal structures with the substrate itself by forming connection terminals directly on substrate surfaces and creating through-substrate vias that integrate multiple connection points. This integration eliminates the need for separate connector components, reducing assembly steps while maintaining reliable electrical connections between stacked substrates.
Solution Approach 2:
The patent introduces an intermediary bonding layer or adhesive material that facilitates the connection between stacked substrates. This intermediary layer provides both mechanical bonding and electrical conductivity, simplifying the assembly process by enabling direct substrate-to-substrate connection without requiring complex external connectors or multiple assembly operations.
3Quantity of substance
If multiple substrates are stacked to increase capacity, then miniaturization is achieved, but the device complexity and replacement difficulty increase
Solution Approach 1:
The patent divides the semiconductor memory system into discrete, independently replaceable substrate modules. Each substrate contains a portion of the total storage capacity and can be individually removed or replaced through the stacked configuration. This segmentation enables selective replacement of defective substrates without requiring replacement of the entire memory device, maintaining ease of repair while achieving high capacity through stacking.
Data Source
AI summary
A semiconductor memory device is included. The semiconductor device includes a semiconductor memory device, comprising: a first substrate including a first semiconductor device mounted on the first substrate and a first connection terminal disposed at an edge of the first substrate; a second substrate including a second semiconductor device mounted on the second substrate and a second connection terminal at an edge of the second substrate; and an interface connector including a first socket portion configured to receive the first connection terminal and a second socket portion configured to receive the second connection terminal. The interface connector further includes: first socket terminals of the first socket portion are connected with the first connection terminals; second socket terminals of the second socket portion are connected with the second connection terminals; and an internal wiring for electrically connecting the first socket terminals with the second socket terminals.