Stacked Semiconductor Memory with Logic Die Switch Routing
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Solution Overview
Problem
In semiconductor memory apparatuses with stacked memory dies, coupling failures between through-electrodes can lead to operational failures, resulting in the entire system being treated as a defective product even if only some memory dies are non-functional.
Innovation Solution
Incorporating a logic die with switch elements that can reroute channels to ensure functionality even if some memory dies fail, allowing the system to operate in mixed or memory module modes, reducing discard rates and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a plurality of memory dies are stacked to produce a stacked memory, then integration and bandwidth are improved, but coupling failures in through-electrodes cause operational failures leading to the entire product being discarded
Solution Approach 1:
The patent divides the memory system into independent functional segments by introducing a logic die with switch elements that can independently route channels to different memory dies. This segmentation allows the system to isolate failures to individual memory dies rather than treating the entire stacked memory as a single failure unit, thereby maintaining productivity when partial failures occur.
Solution Approach 2:
The patent changes the operational parameters of the system by introducing reconfigurable channel routing through switch elements. This allows the system to dynamically adjust which memory dies are active and which channels are routed where, enabling continued operation with modified parameters when certain memory dies fail, thus improving manufacturing yield.
2Reliability
If dedicated through-electrodes are provided for each memory die, then operational reliability is improved, but coupling failures still occur and cause the entire stacked memory to be treated as defective
Solution Approach 1:
The patent introduces a logic die with switch elements as an intermediary between the memory interface and the stacked memory dies. This intermediary provides intelligent routing capabilities that can detect and adapt to coupling failures in through-electrodes, redirecting signals through alternative paths when failures occur, thereby maintaining reliability without requiring redundant through-electrodes in each memory die.
Solution Approach 2:
The patent makes the channel routing dynamic and reconfigurable through switch elements in the logic die. Instead of fixed dedicated through-electrodes for each memory die, the system can dynamically adjust routing paths based on the operational status of individual dies, allowing adaptation to failures while managing device complexity efficiently.
3Loss of substance
If coupling failures occur in through-electrodes of stacked memory dies, then manufacturing costs increase due to discarding functional products, but the number of through-electrodes required remains large
Solution Approach 1:
The patent enables recovery of partially functional stacked memory products by introducing reconfigurable routing that can bypass failed memory dies or through-electrodes. Instead of discarding entire stacked memories with partial failures, the system recovers functionality by redirecting channels to operational memory dies, significantly reducing waste of functional products while managing manufacturing complexity through intelligent routing.
Data Source
AI summary
A semiconductor memory apparatus includes a plurality of memory dies and a logic die, which are stacked to each other. The logic die includes a memory interface for a memory apparatus to be coupled to the semiconductor memory apparatus, and a switch coupled to a plurality of channels included in a control device which controls the semiconductor memory apparatus. The switch includes a first switch element which couples one of the plurality of channels to the memory interface or one of the plurality of memory dies, and a second switch element which couples another one of the plurality of channels to another one of the plurality of memory dies. Even if some memory dies are defective, the semiconductor memory apparatus is capable to operate.