Stacked Semiconductor Memory Through Electrode Test Signal Routing

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Solution Overview

Problem

Stack type semiconductor memories face challenges in efficiently transmitting external input signals for test operation control using a minimum number of through electrodes, which is crucial for effective testing and integration.

Innovation Solution

A stack type semiconductor memory system is designed with a base die and core dies stacked and electrically coupled through through electrodes, where the base die generates preliminary test mode signals that are decoded and transmitted to the core dies, allowing the core dies to set and perform test modes, thereby enabling efficient test operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If multiple through electrodes are used to transmit test control signals between stacked dies, then test operation control is achieved, but the number of through electrodes increases

Engineering Contradiction:
Improvetest operation controlVSAvoidnumber of through electrodes
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The through electrodes are designed to serve dual purposes: transmitting both normal operational signals and test control signals between stacked dies. This multi-functionality allows the same physical structure to support both operational and testing requirements, eliminating the need for separate dedicated test signal paths and thereby reducing the total number of through electrodes required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Test mode setup input signals are decoded and converted into appropriate test control signals before being transmitted through the electrodes. By performing the signal conversion and mode setup in advance at the base die, the system prepares the correct test signals beforehand, allowing efficient transmission through minimal electrodes without requiring additional electrodes for real-time signal conversion at each die.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If through electrodes are minimized for stacking, then integration density improves, but signal transmission efficiency for testing deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidsignal transmission efficiency
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The signal transmission function is segmented and distributed: the base die performs signal decoding and test mode setup, generating preliminary test signals that are then transmitted through the minimized set of through electrodes to the upper dies. This segmentation allows the complex signal processing to occur at the base die while maintaining simple, efficient signal transmission through the stacked structure, thereby preserving both integration density and transmission efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The base die acts as an intermediary that receives external test control signals, decodes them, generates the appropriate preliminary test mode signals, and transmits them through the through electrodes to the other dies. This intermediary function at the base die enables efficient signal transmission through minimal electrodes by preparing the signals in advance and routing them through the most direct path.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If base die decodes and transmits preliminary test mode signals through through electrodes, then test mode setup is efficient, but device complexity increases

Engineering Contradiction:
Improvetest mode setup efficiencyVSAvoidsignal decoding and transmission structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The signal decoding function and test mode setup function are merged into the base die, along with the transmission function through the through electrodes. By combining these functions in a single location rather than distributing them across multiple dies, the system reduces overall device complexity while maintaining efficient test mode setup. The base die becomes a centralized control point that handles all test signal processing and distribution.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9773569B2Stack type semiconductor memory and semiconductor system using the same
Publication Date: 2017.09.26 SK HYNIX INC
  • US9773569B2 patent drawing
  • US9773569B2 patent drawing
  • US9773569B2 patent drawing

AI summary

A stack type semiconductor memory includes a plurality of stacked dies configured to transmit signals through a plurality of through electrodes. Any one die of the plurality of stacked dies is configured to provide preliminary test mode signals to other dies through the plurality of through electrodes, and the other dies are configured to generate test mode signals according to the preliminary test mode signals transmitted through the plurality of through electrodes.