Stacked Microelectronic Assembly Thermal Management

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Solution Overview

Problem

Stacked microelectronic assemblies face challenges with heat dissipation, thermal expansion mismatch, and reliability issues due to the compact nature of stacked chip designs, which complicates testing and increases manufacturing costs.

Innovation Solution

A stacked microelectronic assembly with a base substrate having conductive lands and solder spheres, along with flexible or rigid dielectric substrates and conductive posts that allow for thermal compensation and reliable electrical connections, enabling efficient heat dissipation and reduced assembly thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple microelectronic devices are stacked in a compact arrangement, then the area occupied on the circuit board is reduced, but heat dissipation becomes more difficult and thermal expansion mismatch increases

Engineering Contradiction:

Improvearea occupied on circuit boardVSAvoidheat dissipation capability

Core Design Contradiction:

Area of stationary objectVSTemperature

Solution Approach 1:

The patent transitions from planar arrangement to three-dimensional stacking, arranging multiple microelectronic devices vertically along the thickness direction. This dimensional change allows multiple devices to occupy a smaller board area while providing thermal pathways through the stack structure, with thermally conductive materials positioned between devices to facilitate heat dissipation from internal layers.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces thermally conductive materials as intermediary elements positioned between stacked microelectronic devices. These intermediary layers serve as thermal pathways, conducting heat away from the devices while also accommodating thermal expansion differences, thus resolving the heat dissipation problem without compromising the compact stacked arrangement.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Area of stationary object

If multiple microelectronic devices are stacked in a compact arrangement, then the area occupied on the circuit board is reduced, but reliability issues increase due to thermal expansion mismatch

Engineering Contradiction:

Improvearea occupied on circuit boardVSAvoidreliability under thermal stress

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The patent modifies the physical parameters of the stacking structure by introducing compliant or flexible interconnection layers between devices. These layers have adjusted mechanical properties that allow them to accommodate differential thermal expansion, maintaining electrical connectivity and structural integrity across temperature cycles, thus improving reliability in the compact stacked configuration.

Inventive Principle:

Principle #35Parameter changes

3Length of stationary object

If compact stacked assembly is used, then assembly thickness is reduced, but testing and manufacturing complexity increases

Engineering Contradiction:

Improveassembly thicknessVSAvoidtesting and manufacturing complexity

Core Design Contradiction:

Length of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the stacked assembly into modular units or layers, each containing specific devices and interconnection structures. This segmentation allows for independent fabrication, testing, and assembly of individual layers, reducing the overall complexity of manufacturing and testing the complete stacked assembly while maintaining compact thickness.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a compact, reliable, and cost-effective stacked assembly that effectively manages thermal expansion and facilitates high-frequency signal testing, ensuring reliable electrical connections and efficient heat dissipation.

Implementation Method 1

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

Methodology Applied

Scientific EffectElastic deformation: Elasticity

Data Source

PatentUS7545029B2Stack microelectronic assemblies

Publication Date: 2009.06.09 ADEIA SEMICONDUCTOR SOLUTIONS LLC

AI summary

A stacked microelectronic assembly includes a base substrate having conductive elements projecting from a bottom surface thereof and a first microelectronic subassembly underlying a bottom surface of the base substrate. The first microelectronic subassembly includes a first dielectric substrate, a first microelectronic element connected with the first dielectric substrate and first conductive posts projecting from the first dielectric substrate toward the bottom surface of the base substrate for electrically interconnecting the first microelectronic element and the base substrate. The assembly also has a second microelectronic subassembly overlying the base substrate. The second microelectronic subassembly includes a second dielectric substrate, a second microelectronic element connected with the second dielectric substrate and second conductive posts projecting toward the top surface of the base substrate for electrically interconnecting the second microelectronic element and the base substrate. The first microelectronic subassembly has a first height and the conductive elements projecting from the bottom surface of the base substrate have a second height that is greater than the first height of the first microelectronic subassembly.