3D Stacked Microelectronic Packages With Sidewall Conductors And Trenches
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Solution Overview
Problem
Traditional microelectronic packaging methods are limited by their two-dimensional approach, which restricts the compactness and performance of electronic devices, as they do not effectively utilize the vertical interconnection of microelectronic devices to reduce signal delay and enhance device performance.
Innovation Solution
The development of three-dimensional microelectronic packaging techniques, where microelectronic devices are stacked and vertically interconnected, with the formation of package surface conductors on the sidewalls of microelectronic packages to facilitate electrical coupling between devices, and the use of trenches to prevent unintended shorting between conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If three-dimensional stacked packaging is implemented, then compactness and device performance are improved, but manufacturing complexity increases due to the need for precise vertical interconnection and conductor formation
Solution Approach 1:
The patent transitions from traditional two-dimensional lateral packaging to three-dimensional stacked packaging, utilizing the vertical dimension to interconnect microelectronic devices. This dimensional change enables compact package sizes by stacking devices vertically rather than arranging them side-by-side, directly addressing the volume reduction goal while managing the inherent manufacturing complexity through systematic conductor formation processes
Solution Approach 2:
The patent divides the package structure into distinct segments including multiple stacked microelectronic devices, package surface conductors formed on sidewalls, and trenches separating adjacent conductors. This segmentation allows for modular manufacturing where conductors are formed on individual device sidewalls and then interconnected, simplifying the overall manufacturing process while achieving compact three-dimensional integration
2Reliability
If package surface conductors are formed on sidewalls to enable vertical interconnection, then electrical coupling efficiency is improved, but the risk of unintended shorting between adjacent conductors increases
Solution Approach 1:
The patent introduces trenches as intermediary structures that physically separate adjacent package surface conductors formed on sidewalls. These trenches act as insulating barriers that prevent unintended electrical shorting between neighboring conductors while allowing the conductors to maintain their vertical interconnection function, thus resolving the conflict between electrical coupling reliability and shorting prevention
Solution Approach 2:
The patent extracts the separation function from the conductor formation process by independently creating trenches between adjacent conductors. This extraction ensures that conductors are formed first to establish electrical coupling, then trenches are created to remove potential shorting paths, systematically addressing both reliability requirements without compromising either function
3Manufacturing precision
If trenches are formed adjacent to package surface conductors to prevent shorting, then manufacturing precision is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent performs preliminary formation of package surface conductors on device sidewalls before creating the separating trenches. This preliminary action establishes the conductor positions and ensures proper electrical coupling is achieved first, then subsequent trench formation precisely controls the spacing between conductors to prevent shorting, thereby improving manufacturing precision through a systematic two-step process
Data Source
AI summary
Embodiments of methods for forming microelectronic device packages include forming a trench on a surface of a package body in an area adjacent to where first and second package surface conductors will be (or have been) formed on both sides of the trench. The method also includes forming the first and second package surface conductors to electrically couple exposed ends of various combinations of device-to-edge conductors. The trench may be formed using laser cutting, drilling, sawing, etching, or another suitable technique. The package surface conductors may be formed by dispensing (e.g., coating, spraying, inkjet printing, aerosol jet printing, stencil printing, or needle dispensing) one or more conductive materials on the package body surface between the exposed ends of the device-to-edge conductors.