Stacked Microfluidic Chips for High-Throughput Sample Sorting
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Solution Overview
Problem
Current microfluidic devices are limited by liquid handling volume and flowrate, hindering their wide-scale application in fields like medical science, life science, and biotechnology, and conventional centrifugation methods are laborious and result in low recovery.
Innovation Solution
A microfluidic system with modular microfluidic chips stacked in a chip stack, featuring parallel processing channels with concatenated inlets and outlets, and a micropillar array for deterministic lateral displacement sorting, controlled by a microcontroller and feedback sensors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional centrifugation techniques are used for biological cell processing, then processing can be performed, but batch processing is required and recovery is low
Solution Approach 1:
The system divides the processing function into multiple parallel microfluidic chips arranged in a stack, with each chip containing multiple processing channels. This segmentation allows simultaneous processing of multiple samples in parallel, increasing throughput while maintaining high recovery rates through precise microfluidic control in each channel.
Solution Approach 2:
The patent transitions from conventional 2D planar microfluidic devices to a 3D stacked architecture where multiple microfluidic chips are vertically arranged. This dimensional change enables parallel processing channels to be stacked vertically, dramatically increasing processing capacity without increasing the footprint area.
2Measurement precision
If typical microfluidic devices are used, then precision processing at micro-scale is achieved, but liquid handling volume is limited to nano- or microliters
Solution Approach 1:
The patent combines multiple microfluidic chips into a stacked configuration where each chip handles a portion of the total volume. The parallel arrangement of multiple channels across multiple chips aggregates the processing capacity to handle larger total volumes while maintaining the precision of individual microfluidic channels.
3Speed
If liquid flowrate is increased to improve processing speed, then throughput increases, but liquid handling capacity becomes a bottleneck
Solution Approach 1:
The system segments the liquid handling function across multiple parallel channels in stacked microfluidic chips. Each channel can operate at optimized flow rates for precision processing, while the aggregate capacity of all channels provides high overall throughput, eliminating the bottleneck of single-channel flow rate limits.
4Productivity
If conventional batch processing methods are used, then processing can be performed, but the process is laborious and time-consuming
Solution Approach 1:
The parallel microfluidic chip stack enables continuous processing of multiple samples simultaneously through all channels, eliminating the sequential batch processing steps. Samples can be processed continuously as they flow through the parallel channels, dramatically reducing turnaround time and improving efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-throughput, efficient, and scalable processing of biological samples with improved recovery and reduced turnaround time, suitable for applications like cell sorting and chemical synthesis.
Implementation Method 1
The micropillars or nanopillars are arranged to provide for deterministic lateral displacement microfluidic sorting of particles traversing the processing channel
Data Source
AI summary
Devices and methods for microfluidic parallel sample processing are described. According to an embodiment a microfluidic system for parallel sample processing is provided. The microfluidic system comprises one or more modules, each module comprising: one or more microfluidic chips arranged in a microfluidic chip stack, each of the one or more microfluidic chips comprising a plurality of processing channels, each processing channel comprising an inlet, an outlet, and a processing section, a combined sample inlet fluidically coupled to each processing channel inlet and configured to concatenate a plurality of the processing channel inlets, and a combined sample outlet fluidically coupled to each processing channel outlet and configured to concatenate a plurality of the processing channel outlets.


