Stacked MIM Capacitor Structure for High Density and Breakdown Voltage
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Solution Overview
Problem
Current metal-insulator-metal (MIM) capacitors face challenges in achieving high capacitance density while maintaining sufficient voltage resistance, limiting their application in advanced semiconductor devices.
Innovation Solution
The proposed solution involves a metal-insulator-metal capacitor structure with additional capacitor stacks and dielectric layers, arranged to increase the capacitance density in one region and enhance voltage resistance in another, using high k dielectric materials and conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacitance density of MIM capacitor is increased, then the capacitance density is improved, but the equivalent oxide thickness (EOT) of dielectric layer decreases which leads to lower break down voltage
Solution Approach 1:
The capacitor structure is divided into multiple separate capacitor units stacked vertically. Each capacitor unit has its own dielectric layer and electrode layers, allowing the total capacitance to be increased by adding more units without reducing the EOT of individual dielectric layers. This segmentation enables high capacitance density while maintaining sufficient voltage resistance in each unit.
Solution Approach 2:
The invention transitions from a planar capacitor structure to a three-dimensional stacked structure. By stacking multiple capacitor units vertically along the thickness direction, the capacitance density is increased in the vertical dimension without compromising the horizontal dimensions or the EOT of individual dielectric layers, thus resolving the voltage resistance issue.
2Quantity of substance
If the EOT of dielectric layer is decreased to increase capacitance density, then the capacitance density is improved, but the normal operation voltage of MIM capacitor has to be lowered
Solution Approach 1:
The total voltage requirement is segmented across multiple capacitor units. Each unit can operate at a higher voltage since its dielectric layer maintains adequate EOT, and the series combination of multiple units achieves the desired total capacitance without requiring reduced operation voltage.
Solution Approach 2:
By stacking capacitor units vertically, the invention increases capacitance density in the thickness direction while allowing each unit to maintain sufficient EOT for higher operation voltages, thus avoiding the need to lower normal operation voltage.
3Quantity of substance
If additional capacitor stacks and dielectric layers are added, then the capacitance density and voltage resistance are improved, but the device complexity increases
Solution Approach 1:
Multiple capacitor units share common electrode layers at their interfaces. The top electrode of one capacitor unit serves as the bottom electrode of the adjacent capacitor unit, reducing the total number of electrode layers needed and simplifying the manufacturing process despite having multiple capacitor units.
Solution Approach 2:
The shared electrode layers serve dual functions: they act as the top electrode for one capacitor unit and the bottom electrode for the next capacitor unit. This multi-functionality reduces the overall number of layers and simplifies the device structure while achieving high capacitance density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for the formation of capacitors with both high capacitance density and improved voltage resistance, effectively addressing the limitations of current MIM capacitors and meeting the demands of advanced semiconductor devices.
Implementation Method 1
metal-insulator-metal capacitor structure
Implementation Method 2
high k dielectric materials
Data Source
AI summary
This disclosure relates to a metal-insulator-metal capacitor structure and a method for forming the same. The metal-insulator-metal capacitor structure includes: a first capacitor dielectric layer, located on a first electrode layer; a second electrode layer, located on the first capacitor dielectric layer in a first capacitor region; and one or more capacitor stacks, located on the second electrode layer in the first capacitor region. Each of the capacitor stacks includes a second capacitor dielectric layer and a third electrode layer located on the second capacitor dielectric layer. Projection overlay regions exist between the third electrode layer and the second electrode layer and between the adjacent third electrode layers. The one or more second capacitor dielectric layers are further located on the first capacitor dielectric layer in the second capacitor region disclosure.


