Stacked MOSFET High-Voltage Stage With Self-Driven Gate Charging
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Solution Overview
Problem
Short-channel CMOS devices have low breakdown voltages, making them unsuitable for high voltage power-conversion regulators, and they suffer from high gate-charge, leading to increased power loss and reduced efficiency in DC-DC converters.
Innovation Solution
The implementation of a buck converter with a stacked MOSFET structure where power MOSFETs are self-driven without driver circuits, and gates are partially charged or discharged through the output inductor to reduce gate-charge/discharge power loss, utilizing a cascode output stage with low side and high side transistors to achieve efficient high voltage switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If short-channel CMOS devices are used in high voltage power-conversion regulators, then device integration and miniaturization are improved, but breakdown voltage is insufficient and gate-charge power loss increases
Solution Approach 1:
The patent divides the high voltage switching function into multiple stacked MOSFETs (first through fourth high side transistors and first through fourth low side transistors) connected in series. Each transistor handles a portion of the total voltage, allowing the use of low-voltage short-channel CMOS devices to achieve high voltage capability while maintaining integration benefits.
Solution Approach 2:
The patent introduces intermediate voltage nodes (first through fourth high side nodes and first through fourth low side nodes) between the stacked transistors. These intermediaries enable progressive voltage distribution and self-driven gate control, allowing each transistor to operate within its voltage rating while collectively handling high voltage.
2Volume of moving object
If short-channel CMOS devices are used in DC-DC converters, then device size is reduced, but gate-charge increases leading to higher power loss
Solution Approach 1:
The patent implements periodic charging and discharging of transistor gates through the inductor during switching cycles. The inductor charges gate capacitors during one phase and discharges them during another, enabling recovery of gate-charge energy and reducing net power loss from gate switching.
Solution Approach 2:
The patent recovers energy that would otherwise be lost in gate charging by using the inductor to store and reuse the charge. The gate charge/discharge process is integrated into the main switching cycle, allowing energy recovery rather than dissipation.
3Ease of operation
If traditional driver circuits are used for MOSFET gates, then transistor switching control is achieved, but circuit complexity and power loss increase
Solution Approach 1:
The patent enables the MOSFET stack to self-drive its own gates using the inductor and internal voltage nodes. The switching transistors control their own gate voltages through the intermediate nodes and inductor coupling, eliminating the need for external driver circuits and reducing overall system complexity.
Solution Approach 2:
The inductor serves multiple functions: it acts as the power conversion element, a gate charge source, a gate discharge path, and an energy storage element. This multi-functionality eliminates the need for separate driver circuits, reducing component count and simplifying the overall design.
Data Source
AI summary
A power converter is disclosed. The power conveter includes a positive power supply, an output node, first, second, and third high side transistors serially connected between the positive power supply and the output node, and a high side bias voltage generator configured to generate a high side bias voltage. A gate of the second high side transistor is connected to the high side bias voltage generator. The power converter also includes a signal driver configured to selectively connect a gate of the first transistor to either the positive power supply or the high side bias voltage generator, a switch configured to selectively connect a gate of the third transistor to the high side bias voltage generator, and a capacitor connected to the gate of the third transistor and to a source of the second high side transistor.


