3D Stacked MTJ MRAM Fabrication for Chip Area Reduction
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Solution Overview
Problem
Current magnetoresistive random access memory (MRAM) devices face issues such as high chip area, high cost, high power consumption, and sensitivity to temperature variations, which affect their performance and reliability.
Innovation Solution
The method involves forming a first and second magnetic tunneling junction (MTJ) on a substrate, with specific electrode and cap layer structures, and a metal interconnection between them, along with a passivation and anti-reflective layer process to create a semiconductor device that addresses alignment and pitch differences during fabrication, enabling more precise and efficient device construction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional MRAM device structures are used, then magnetoresistive functionality is achieved, but chip area is large
Solution Approach 1:
The patent transitions from planar 2D MTJ structures to vertically stacked 3D MTJ structures. Multiple MTJ stacks are arranged in vertical columns with shared bottom electrodes, utilizing the third dimension (height) to increase device density without expanding chip area. This dimensional transition allows multiple memory cells to occupy the same footprint area by stacking them vertically.
Solution Approach 2:
The shared bottom electrode structure serves multiple functions: it acts as the bottom electrode for multiple MTJ stacks simultaneously, provides a common magnetic reference layer, and serves as an interconnection element. This multi-functionality reduces the number of separate components needed, thereby reducing overall chip area while maintaining full magnetoresistive functionality across all memory cells.
2Manufacturing precision
If conventional MTJ fabrication processes are used, then magnetic tunneling junctions are formed, but alignment precision is poor
Solution Approach 1:
The patent forms the bottom electrode structure and magnetic reference layers before creating the tunnel barriers and free layers. This preliminary structuring establishes precise alignment references that guide subsequent deposition steps. The bottom electrode patterns are formed with high precision first, then subsequent layers are deposited and patterned relative to these pre-established references, ensuring cumulative alignment accuracy throughout the complex multi-layer fabrication process.
Solution Approach 2:
The fabrication process is divided into distinct modular stages: bottom electrode formation, magnetic reference layer deposition, tunnel barrier formation, free layer deposition, and cap layer formation. Each stage can be independently optimized and controlled, allowing precise alignment to be achieved at each step rather than attempting to control the entire process as a single complex operation. This segmentation enables better process control and higher overall alignment precision.
3Reliability
If standard passivation and interconnection processes are used, then device protection is provided, but pitch differences cause fabrication issues
Solution Approach 1:
The patent applies different etch selectivities to different regions of the structure. The cap layer has higher etch selectivity compared to the passivation layer, allowing selective removal of the cap layer in specific regions without significantly affecting the passivation layer. This local differentiation in material properties enables precise pitch control during contact hole formation while maintaining comprehensive device protection through the remaining passivation structure.
Solution Approach 2:
The patent utilizes etch selectivity parameters to differentiate between the cap layer and passivation layer. By adjusting etch conditions to exploit the selectivity difference, the process can selectively remove the cap layer to create contact openings while preserving the passivation layer for device protection. This parameter-based control allows precise pitch definition without compromising the protective function of the passivation structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a more compact, cost-effective, and temperature-stable MRAM device with improved sensitivity and reduced power consumption, overcoming the limitations of existing MRAM technologies.
Implementation Method 1
Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field. The physical definition of such effect is defined as a variation in resistance obtained by dividing a difference in resistance under no magnetic interference by the original resistance.
Data Source
AI summary
A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate; forming a first top electrode on the first MTJ and a second top electrode on the second MTJ; forming a cap layer on the first MTJ and the second MTJ; forming a passivation layer on the cap layer; removing part of the passivation layer to form a recess between the first MTJ and the second MTJ; forming an anti-reflective layer on the passivation layer and filling the recess; and removing the anti-reflective layer, the passivation layer, and the cap layer to form a first contact hole.