Stacked MTJ Image Sensor Memory Layout for Small-Cell 3D Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In semiconductor devices with a three-dimensional structure, it is challenging to form a storage element with a small cell size and circuit scale while maintaining favorable characteristics.

Innovation Solution

A semiconductor device is proposed, featuring a stack of first and second semiconductor substrates. The first substrate includes an imaging element and a first memory element with a stacked structure of a magnetization fixed layer, a nonmagnetic layer, and a storage layer, positioned from the light incident surface side.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a three-dimensional structure with two bonded semiconductor substrates is used for miniaturization, then device integration is improved, but forming storage elements with small cell size and favorable characteristics becomes difficult

Engineering Contradiction:
Improvedevice integrationVSAvoidstorage element formation
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent applies dimensionality change by transitioning from planar to three-dimensional stacked structure. The memory element is positioned on the front surface of the first substrate while the imaging element is on the back surface, utilizing the third dimension (depth/stacking direction) to accommodate both functions within a compact volume, thereby achieving miniaturization without compromising storage element characteristics

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The semiconductor device is segmented into two separate substrates: a first substrate containing the memory element and a second substrate containing the imaging element. These substrates are bonded together through their respective front and back surfaces, allowing independent optimization of each substrate's structure and manufacturing process while achieving high integration in the final stacked configuration

Inventive Principle:
Principle #1Segmentation

2Area of moving object

If the cell size of storage elements is reduced for miniaturization, then device density is improved, but maintaining favorable characteristics becomes difficult

Engineering Contradiction:
Improvecell sizeVSAvoidstorage element characteristics
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by providing different structural configurations for different functional regions. The memory element on the front surface is given a specific structure with the magnetization fixed layer, nonmagnetic layer, and storage layer arranged in a particular sequence, while the imaging element on the back surface has its own optimized structure, allowing each region to maintain its required characteristics despite the overall miniaturization

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If a stacked structure of magnetization fixed layer, nonmagnetic layer, and storage layer is used, then manufacturing ease is improved, but layer damage risk must be managed

Engineering Contradiction:
Improvelayer formationVSAvoidfixed layer damage
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by forming the magnetization fixed layer, nonmagnetic layer, and storage layer in a specific stacked sequence on the front surface of the first substrate before bonding to the second substrate. This predetermined layer arrangement is established in advance to facilitate manufacturing while the bonding process is carefully controlled to prevent damage to the previously formed fixed layer

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for the easy formation of imaging devices with MTJ elements having a small cell size, small circuit scale, and low error rates at predetermined applied voltages, while avoiding damage to the fixed layer.

Implementation Method 1

a magnetic tunnel junction (MTJ) element having a stacked structure in which a magnetization fixed layer, a nonmagnetic layer, and a storage layer are stacked in the order mentioned from the light incident surface side

Methodology Applied
Scientific EffectTunnel magnetoresistance: Magnetoresistance

Implementation Method 2

an imaging element that generates a charge in response to light from a light incident surface of the first semiconductor substrate

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS20250185406A1Semiconductor device and electronic device
Publication Date: 2025.06.05 SONY SEMICON SOLUTIONS CORP
  • US20250185406A1 patent drawing
  • US20250185406A1 patent drawing
  • US20250185406A1 patent drawing

AI summary

Provided is a semiconductor device (10) including a stack of a first semiconductor substrate (100) and a second semiconductor substrate (200), in which the first semiconductor substrate includes an imaging element (300) that generates a charge in response to light from a light incident surface of the first semiconductor substrate and a first memory element (400) provided on a side opposite to the light incident surface with respect to the imaging element, and the first memory element has a stacked structure in which a magnetization fixed layer (402), a nonmagnetic layer (404), and a storage layer (406) are stacked in the order mentioned from the light incident surface side.