Stacked Non-Volatile Memory Device With Semiconductor Columns
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Solution Overview
Problem
Non-volatile memory devices with a multilayer structure face challenges in connecting and selecting memory cells across layers, leading to increased manufacturing costs and complexity, while conventional monolayer structures lack integration and data processing capacity.
Innovation Solution
A non-volatile memory device with a stacked structure featuring semiconductor columns, multiple control gate electrodes, and charge storage layers, along with a method of fabricating the device that includes forming trenches, charge storage layers, and patterning semiconductor columns to create a high-integration, cost-effective memory solution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a multilayer structure is used to increase integration, then the degree of integration is improved, but the device complexity increases due to difficulties in connecting and selecting memory cells across layers
Solution Approach 1:
The memory device is segmented into multiple independent layers, each layer functioning as a complete memory cell with its own charge storage layer and control gates. This segmentation allows each layer to operate independently while contributing to overall integration, avoiding the complexity of inter-layer connections required in conventional stacked structures.
Solution Approach 2:
The patent transitions from conventional planar or vertically-stacked structures to a lateral multi-layer configuration where memory cells are arranged in multiple layers side-by-side. This dimensional reorganization allows high integration without requiring complex vertical interconnections, as each layer remains accessible through separate control gate electrodes.
2Adaptability or versatility
If more stacked layers are added to increase integration, then the degree of integration is improved, but the manufacturing cost increases due to additional manufacturing processes
Solution Approach 1:
Multiple memory cell layers share common structural elements and manufacturing processes. The charge storage layers, semiconductor columns, and control gate structures are formed using integrated fabrication sequences that simultaneously create multiple layers, reducing the cumulative manufacturing steps compared to forming each layer separately.
Solution Approach 2:
The fabrication process employs universal patterns and materials that serve multiple functions across different layers. Control gate electrodes and charge storage layers are designed with multi-functional characteristics that allow them to participate in both individual layer operation and collective device functionality, streamlining the manufacturing process.
Data Source
AI summary
Provided are a non-volatile memory device that may expand to a stacked structure and may be more easily highly integrated and an economical method of fabricating the non-volatile memory device. The non-volatile memory device may include at least one semiconductor column. At least one first control gate electrode may be arranged on a first side of the at least one semiconductor column. At least one second control gate electrode may be arranged on a second side of the at least one semiconductor column. A first charge storage layer may be between the at least one first control gate electrode and the at least one semiconductor column. A second charge storage layer may be between the at least one second control gate electrode and the at least one semiconductor column.