Stacked Oxide Semiconductor Layers for High-Mobility Transistors
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving transistors with excellent electrical characteristics, miniaturized structure, high on-state current, low off-state current, high field-effect mobility, and high yield, particularly in using oxide semiconductor films for display devices.
Innovation Solution
A method for manufacturing a semiconductor device involving the formation of stacked oxide semiconductor layers with specific atomic ratios and energy band alignments, followed by dry and wet etching treatments to create a transistor structure with a gate insulating film and electrodes, optimizing the channel length and width for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single oxide semiconductor layer is used to form a transistor, then the manufacturing process is simple, but the electrical characteristics and field-effect mobility are insufficient
Solution Approach 1:
The oxide semiconductor layer is divided into multiple sub-layers (first oxide semiconductor layer, second oxide semiconductor layer, and third oxide semiconductor layer) with different atomic ratios and compositions. Each layer serves a specific function: the first layer provides a base structure, the second layer (with higher In atomic ratio) enhances carrier mobility in the channel formation region, and the third layer provides interface stability. This segmentation allows optimization of electrical characteristics while maintaining a manageable manufacturing process.
Solution Approach 2:
The patent employs a composite oxide semiconductor structure where layers with different compositions (In-Ga-Zn-O with varying atomic ratios) are stacked together. The composite structure combines the advantages of each layer: the In-rich second layer provides high mobility, while the Ga-Zn-O based first and third layers provide structural stability and interface quality. This composite approach achieves superior electrical characteristics that cannot be obtained with a single uniform oxide semiconductor layer.
2Productivity
If the transistor structure is miniaturized to improve integration, then the device density increases, but the on-state current and electrical performance deteriorate
Solution Approach 1:
The patent applies local quality by creating a specific In-rich region (second oxide semiconductor layer) within the channel formation region where high carrier mobility is most needed. This localized In enrichment provides enhanced electrical performance precisely where required for miniaturized devices, allowing the transistor to maintain high on-state current even when scaled down. The rest of the structure uses standard compositions to ensure overall stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in transistors with enhanced electrical characteristics, high on-state current, low off-state current, and high field-effect mobility, while also enabling the production of semiconductor devices with improved yield and miniaturized structures.
Implementation Method 1
performing dry etching treatment, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film
Implementation Method 2
removing the reaction product by wet etching treatment after removal of the mask layer
Data Source
AI summary
A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.


