Stacked Oxide TFT Active Layer for Heat Dissipation and Compact Size

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Solution Overview

Problem

The existing thin film transistor (TFT) structures in display panels suffer from reduced heat-dissipating efficiency due to large active layers, leading to decreased performance and display effect, particularly in high load regions.

Innovation Solution

The TFT structure is redesigned with first and second active portions in different layers, partially non-overlapping projections, and connected to a source-drain electrode, utilizing an oxide semiconductor to increase heat-dissipating channels and reduce overall size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the active layer is made large to ensure sufficient current driving capability, then the transistor can drive high load, but the heat-dissipating efficiency is reduced

Engineering Contradiction:
Improvecurrent driving capabilityVSAvoidheat-dissipating efficiency
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent transitions from a conventional planar active layer to a three-dimensional stacked structure with first and second active portions arranged in different layers. This vertical stacking enables the active layer to maintain large effective area for current driving while reducing the horizontal footprint, thereby improving heat dissipation through increased surface area-to-volume ratio and better thermal pathways.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The active layer is segmented into multiple discrete active portions (first active portion and second active portion) arranged in different layers. This segmentation allows each portion to be optimally sized and positioned for both current driving and heat dissipation, preventing the heat accumulation that occurs in large monolithic active layers.

Inventive Principle:
Principle #1Segmentation

2Power

If the active layer is made large to ensure sufficient current driving capability, then the transistor can drive high load, but the overall size of the TFT increases

Engineering Contradiction:
Improvecurrent driving capabilityVSAvoidoverall size of TFT
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

By stacking active portions in the vertical dimension (different layers), the patent achieves large effective active area for current driving without proportionally increasing the horizontal footprint. The projected area of each active portion can be smaller than conventional designs while the stacked configuration maintains sufficient total active area for high current driving capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of energy

If the active layer is optimized for heat dissipation by reducing size, then heat-dissipating efficiency improves, but the current driving capability is reduced

Engineering Contradiction:
Improveheat-dissipating efficiencyVSAvoidcurrent driving capability
Core Design Contradiction:
Loss of energyVSPower

Solution Approach 1:

The stacked configuration of first and second active portions in different layers creates a structure where the effective active area for current driving is distributed vertically. This allows each layer to be optimized for heat dissipation while the cumulative effect across multiple layers maintains sufficient current driving capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Segmenting the active layer into multiple portions allows each segment to be sized appropriately for heat dissipation while the collective arrangement in stacked layers preserves the total current driving capability. The segmentation enables independent optimization of each active portion for thermal management.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250338716A1Array substrate, display panel and display device
Publication Date: 2025.10.30 HUBEI YANGTZE IND INNOVAION CENT OF ADVANCED DISPLAY CO LTD
  • US20250338716A1 patent drawing
  • US20250338716A1 patent drawing
  • US20250338716A1 patent drawing

AI summary

An array substrate, a display panel and a display device are provided by the present application. The array substrate includes a substrate and a thin film transistor. The thin film transistor is located on a side of the substrate, the thin film transistor includes an active layer, a gate, and a source-drain electrode, the active layer includes at least one first active portion and at least one second active portion, which are arranged in different layers, a projection of the first active portion at least partially does not overlap a projection of the second active portion, the source-drain electrode is located on a side of the active layer away from the substrate, and the first active portion and the second active portion are connected to the source-drain electrode. The first active portion and the second active portion includes an oxide semiconductor.