Stacked Segmented Power Amplifier Bias Control for Linearity
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Solution Overview
Problem
Integrated power amplifiers face limitations in output power, linearity, and reliability due to non-linearities and variations from process, voltage, and temperature (PVT) changes, as well as aging, which affect their output 1 dB compression point (OP1dB).
Innovation Solution
A stacked segmented power amplifier circuitry with controllable segments and independent back gate bias control for each transistor unit, allowing for precise body bias adjustment to enhance linearity and reliability, and adapt to PVT variations and aging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the output power of the power amplifier is increased, then the amplification capability is improved, but the linearity deteriorates due to non-linearities of components and circuits
Solution Approach 1:
The power amplifier is divided into multiple parallel amplifier segments (first amplifier segment, second amplifier segment, third amplifier segment), each with independent back gate bias control. This segmentation allows each segment to operate in its optimal linearity region while collectively providing high output power, resolving the contradiction between power and linearity.
Solution Approach 2:
Each amplifier segment is provided with independent back gate bias voltage control, allowing local optimization of operating conditions for each segment. This enables different segments to have different bias conditions tailored to their specific function, improving overall linearity while maintaining high power output.
2Adaptability or versatility
If the power amplifier is designed to handle PVT variations and aging, then the robustness is improved, but the device complexity increases
Solution Approach 1:
The power amplifier employs automatic bias control where the back gate bias voltages are automatically adjusted based on detected output power levels and operational conditions. The control circuit self-regulates the bias conditions to compensate for PVT variations and aging effects without requiring external intervention, improving robustness while keeping the control mechanism integrated and relatively simple.
Solution Approach 2:
The system incorporates feedback mechanisms where the output signal is detected and used to adjust the back gate bias voltages of the amplifier segments. This feedback loop enables the amplifier to automatically adapt to changing conditions including PVT variations and aging, improving robustness through a controlled feedback system rather than complex open-loop design.
3Reliability
If multiple amplifier segments with independent back gate bias control are used, then the linearity is improved, but the device complexity increases
Solution Approach 1:
The control circuits for the back gate bias voltages of multiple amplifier segments are merged into a unified control architecture. The control unit integrates the bias control functions for all segments, allowing coordinated adjustment of multiple segments through a single control system, thereby improving linearity while avoiding the complexity of completely independent control circuits for each segment.
Solution Approach 2:
The back gate bias control mechanism is designed with universal functionality that can simultaneously control multiple amplifier segments. The control circuit performs multiple functions including power level detection, bias calculation, and simultaneous adjustment of multiple segments, reducing overall system complexity while achieving improved linearity through multi-segment control.
Data Source
AI summary
A power amplifier circuitry (100) comprises: a transistor stack (110) comprising at least two stacked transistor units (112A, 112B, 112C) for amplifying input signals; wherein each stacked transistor unit (112A, 112B, 112C) comprises a plurality of controllable segments (120-1 to 120-N, 130-1 to 130-N, 140-1 to 140-N), each comprising a segment transistor (122, 132, 142), wherein source terminals (123, 133, 143) within each transistor unit are connected, drain terminals (125, 135, 145) within each transistor unit are connected and gate terminals (124, 134, 144) within each transistor unit are connected, wherein each segment transistor (122, 132, 142) further comprises a back gate terminal (126, 136, 146) for setting a body bias, wherein at least two of the segment transistors (122, 132, 142) within each transistor unit have independently connected back gate terminals (126, 136, 146); and a control unit (190) configured to control the body bias for selecting an amplifier class of each of the controllable segments (120-1 to 120-N, 130-1 to 130-N, 140-1 to 140-N) of each of the stacked transistor units (112A, 112B, 112C).