Stacked Semiconductor Package Alignment Without Intermediate Wiring
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Solution Overview
Problem
Conventional semiconductor packages face challenges in alignment accuracy and increased thickness due to the use of intermediate wiring layers, hindering the development of smaller, more efficient semiconductor packages.
Innovation Solution
The integration of alignment posts and pads directly into molding films, eliminating the need for intermediate wiring layers, provides precise alignment and reduces package thickness by encapsulating chips within molding films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If intermediate wiring layers are used for chip stacking, then electrical connectivity is achieved, but package thickness increases and alignment accuracy deteriorates
Solution Approach 1:
The patent removes the intermediate wiring layer from the chip stacking structure. Instead of using a separate wiring layer for electrical connection and alignment, the alignment post is directly formed within the molding film that encapsulates the chip, eliminating the need for the intermediate wiring layer and thereby reducing package thickness while improving alignment accuracy.
Solution Approach 2:
The patent combines the alignment function and electrical connection function into a single integrated structure. The alignment post serves both as an alignment reference and as an electrical connection pathway, merging what were previously separate functions (alignment marking and wiring) into one component, thus eliminating the need for intermediate wiring layers.
2Reliability
If intermediate wiring layers are used, then electrical connectivity is established, but device complexity increases
Solution Approach 1:
The patent merges the alignment post and wiring function into a single integrated structure. The alignment post is formed to extend through the molding film and provide both alignment reference and electrical connection pathways, eliminating the need for separate intermediate wiring layers and reducing overall package structure complexity.
Solution Approach 2:
The alignment post serves multiple functions simultaneously: it acts as an alignment reference for chip positioning, provides electrical connection pathways between chips, and serves as a structural support element. This multi-functionality eliminates the need for separate intermediate wiring layers, reducing device complexity while maintaining electrical connectivity.
Data Source
AI summary
A semiconductor package includes a package substrate, a first chip group including at least one first chip spaced apart from the package substrate in a first direction perpendicular to a surface of the package substrate, a second chip group including at least one second chip disposed between the package substrate and the first chip group, a first molding film that surrounds the first chip group, a second molding film that surrounds the second chip group, and an alignment post that penetrates the first molding film and contacts the second molding film. The second molding film covers a surface of an end portion of the alignment post facing the package substrate.