Semiconductor package
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Solution Overview
Problem
The existing methods for connecting multiple semiconductor chips to a package substrate result in yield reduction due to bubble formation and increased costs, making it difficult to downsize semiconductor packages.
Innovation Solution
A semiconductor package structure is designed with a package substrate, base and stacked semiconductor chips, an organic layer, and connection structures that include filling and surface layers, allowing for different thickness portions to alleviate bubble occurrence and reduce costs while enabling downsizing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a post is formed using photoresist to connect stacked semiconductor chips to the package substrate, then electrical connection is achieved, but bubble generation occurs due to the stepped structure of stacked chips, leading to sharp reduction in yield
Solution Approach 1:
The organic layer is formed in advance before stacking the semiconductor chips, creating a pre-prepared connection structure that eliminates bubble formation during subsequent chip stacking and molding processes
Solution Approach 2:
The organic layer acts as an intermediary material between the package substrate and stacked semiconductor chips, providing both mechanical support and electrical connection while preventing bubble generation in the stepped structure regions
2Adaptability or versatility
If additional molding is performed to stack more semiconductor chips, then chip stacking capability is improved, but production costs increase and product downsizing becomes difficult
Solution Approach 1:
The organic layer serves multiple functions simultaneously: it acts as an insulating layer, a bonding support, an electrical connection medium through embedded conductors, and a structural filler, eliminating the need for additional molding processes
Solution Approach 2:
The formation of the organic layer with embedded connection structures is merged with the chip stacking process, allowing multiple chips to be stacked without requiring separate molding steps for each chip addition
3Reliability
If the organic layer contains connection structures with filling and surface layers, then electrical connection and insulation are improved, but manufacturing complexity increases
Solution Approach 1:
The connection structure is segmented into distinct functional layers: a filling layer that provides mechanical support and electrical conduction, and a surface layer that provides insulation and planarization, with each layer optimized for its specific function
Data Source
AI summary
A semiconductor package may include: a package substrate; a base semiconductor chip above the package substrate, the base semiconductor chip including a base pad in contact with the package substrate; at least one stacked semiconductor chip above the base semiconductor chip, the at least one stacked semiconductor chip including a chip pad connected to the package substrate; and an organic layer between the package substrate and the at least one stacked semiconductor chip in a first direction perpendicular to a surface of the package substrate; at least one connection structure in the organic layer, the at least one connection structure connecting the package substrate and the chip pad of the at least one stacked semiconductor chip, wherein the at least one connection structure includes a filling layer and a surface layer surrounding at least a portion of the filling layer.