Stacked Semiconductor Package with Embedded Capacitor Protection
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Solution Overview
Problem
Existing semiconductor packaging techniques have limitations in achieving high integration density and efficient communication bandwidth between stacked semiconductor dies, particularly in protecting embedded passive devices like capacitors during manufacturing processes.
Innovation Solution
The proposed solution involves a semiconductor package design with vertically stacked semiconductor dies connected through a local interconnect device, incorporating deep trench capacitors and a redistribution structure to enhance communication bandwidth, and using a molding process to protect the passive devices during encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor dies are vertically stacked to increase integration density, then the number of components per unit area increases, but the communication bandwidth between stacked dies becomes a limiting factor
Solution Approach 1:
The patent segments the interconnection system into multiple parallel pathways by providing multiple conductive joints between stacked semiconductor dies. This segmentation allows data communication to occur simultaneously through multiple channels, thereby increasing overall communication bandwidth while maintaining high integration density through vertical stacking.
2Reliability
If deep trench capacitors are embedded in semiconductor substrates to improve power integrity, then power delivery capability increases, but the manufacturing complexity and difficulty increase
Solution Approach 1:
The patent applies preliminary action by forming deep trench capacitors and their conductive structures before stacking the semiconductor dies. The capacitors are pre-integrated into the substrate with conductive joints prepared in advance, which simplifies the subsequent stacking process and reduces overall manufacturing complexity while maintaining power integrity.
Solution Approach 2:
The deep trench capacitors are nested within the semiconductor substrate structure, with conductive joints embedded inside the substrate. This nesting approach integrates multiple functions (capacitance, conduction, structural support) into a single compact unit, reducing the number of separate manufacturing steps and lowering overall device complexity.
3Ease of manufacture
If conventional packaging techniques are used to encapsulate stacked dies, then the manufacturing process is simpler, but the embedded passive devices lack adequate protection
Solution Approach 1:
The patent employs composite encapsulation materials that provide both mechanical protection and electrical isolation for the embedded passive devices. The encapsulant is formulated to protect sensitive capacitor structures from moisture and physical damage while maintaining the simplicity of the encapsulation process, thereby achieving both ease of manufacture and reliable device protection.
Data Source
AI summary
A semiconductor package includes an interposer including a first redistribution structure, a first semiconductor die electrically coupled to the first redistribution structure through conductive joints, and a first encapsulant disposed on the first redistribution structure and laterally covering the first semiconductor die. The first semiconductor die includes a semiconductor substrate including a first side facing the first redistribution structure and a second side opposite to the first side, a through substrate via provided within the semiconductor substrate, and a passive device disposed between the second side of the semiconductor substrate and the conductive joints.