Stacked Semiconductor Package Layout for Stable Corner Interconnects

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Solution Overview

Problem

The increasing integration of chips in stacked semiconductor packages leads to issues with structural stability and defects due to the increased number of solder bumps, which can cause electrical shorts and mechanical instability.

Innovation Solution

A semiconductor package design featuring a first die with signal and peripheral regions, where connection terminals are denser on the peripheral regions adjacent to corners and less dense on lateral surfaces, and an under-fill process that prevents excessive protrusion onto lateral surfaces, ensuring improved structural stability and reduced defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of solder bumps is increased to achieve higher chip integration, then the integration capability is improved, but the structural stability deteriorates and defects increase

Engineering Contradiction:
Improvechip integration capabilityVSAvoidstructural stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by differentiating the connection terminal density across different peripheral regions. Corner regions have higher connection terminal density while lateral surface regions have lower density, optimizing both structural stability and integration capability in different locations rather than using uniform distribution throughout the die.

Inventive Principle:
Principle #3Local quality

2Productivity

If the number of solder bumps is increased to achieve higher chip integration, then the integration capability is improved, but the occurrence of defects such as electrical shorts increases

Engineering Contradiction:
Improvechip integration capabilityVSAvoiddefect rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements local quality by varying connection terminal density across different peripheral regions. Corner regions with higher connection terminal density provide enhanced reliability, while lateral surface regions with lower density reduce the overall defect occurrence, thus improving integration capability while controlling defect rates.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If connection terminals are uniformly distributed on the peripheral region, then the manufacturing process is simplified, but the structural stability deteriorates

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidstructural stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by differentiating connection terminal density between corner regions and lateral surface regions. This non-uniform distribution enhances structural stability in corner regions while maintaining manufacturing feasibility through defined regional patterns, resolving the contradiction between manufacturing simplicity and structural stability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the peripheral region into distinct zones: corner regions with higher connection terminal density and lateral surface regions with lower density. This segmentation allows optimized structural stability in critical corner areas while maintaining overall manufacturing feasibility through systematic regional differentiation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240371835A1Semiconductor package and method of fabricating the same
Publication Date: 2024.11.07 SAMSUNG ELECTRONICS CO LTD
  • US20240371835A1 patent drawing
  • US20240371835A1 patent drawing
  • US20240371835A1 patent drawing

AI summary

Disclosed are semiconductor packages and their fabricating methods. The semiconductor package comprises connection terminals between a first die and a second die. The first die has signal and peripheral regions and includes first vias on the peripheral region. The second die is on the first die and has second vias on positions that correspond to the first vias. The connection terminals connect the second vias to the first vias. The peripheral region includes first regions adjacent to corners of the first die and second regions adjacent to lateral surfaces of the first die. The connection terminals include first connection terminals on the first regions and second connection terminals on the second regions. A sum of areas of the first connection terminals per unit area on the first regions is greater than that of areas of the second connection terminals per unit area on the second regions.