Stacked Semiconductor Package Layout for High-Density Routing
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Solution Overview
Problem
Existing semiconductor device packages, such as BGA packages, face challenges in achieving higher efficiency, performance, and smaller dimensions while maintaining structural strength and efficient manufacturing processes.
Innovation Solution
The proposed semiconductor device package structure includes a substrate with electronic components and sensors, encapsulated by a package body that exposes electrical contacts, allowing for efficient external connection and manufacturing through advanced molding and singulation techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If BGA package structure is used to increase lead count and reduce footprint, then device integration density is improved, but manufacturing complexity increases
Solution Approach 1:
The substrate is divided into a first substrate portion and a second substrate portion, with each portion having its own array of electrical contacts. This segmentation allows for independent fabrication and assembly of each substrate portion, simplifying the manufacturing process while achieving high integration density through the combined structure.
Solution Approach 2:
The patent transitions from a traditional single-substrate BGA package to a multi-layer stacked configuration where two substrate portions are positioned at different vertical levels. This dimensional change allows electrical contacts to be arranged in three-dimensional space, increasing lead count without proportionally increasing footprint area, while each individual substrate layer maintains manageable manufacturing complexity.
2Reliability
If substrate area is increased to route interconnections, then device performance is improved, but package footprint increases
Solution Approach 1:
The patent utilizes vertical stacking to route interconnections between the first and second substrate portions through through-substrate vias and interlayer connectors. This three-dimensional routing approach allows sufficient trace length and signal routing capability without requiring increased horizontal substrate area, thereby maintaining small package footprint while ensuring adequate signal integrity and device performance.
Solution Approach 2:
The second substrate portion is positioned within the footprint boundary defined by the first substrate portion, with electrical contacts nested in corresponding locations. This nesting arrangement allows both substrate portions to share the same horizontal footprint space, effectively doubling the functional capacity without increasing the overall package footprint area.
3Strength
If double-sided molding is implemented to increase structural strength, then package reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent integrates the structural support function into the package body itself rather than requiring separate reinforcement structures. The package body is designed to encapsulate both substrate portions and provide mechanical support, electrical isolation, and environmental protection in a single molded structure, achieving double-sided structural strength through unified design rather than complex multi-step manufacturing processes.
Data Source
AI summary
A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.