Stacked Semiconductor Package With Vertical Heat Transfer Path
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Solution Overview
Problem
The increasing demand for miniaturized and high-performance semiconductor chips necessitates improved heat dissipation characteristics to enhance the reliability of semiconductor packages.
Innovation Solution
A semiconductor package design incorporating a lower redistribution structure, an adhesive layer, an upper encapsulating layer, a heat dissipation member, and a heat transfer material layer to facilitate efficient heat dissipation and structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor chips are miniaturized to improve device integration, then device density and functionality increase, but heat dissipation becomes more difficult and reliability decreases
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional vertical heat dissipation by stacking multiple chip structures (lower chip structure, upper chip structure) with heat dissipation members positioned at different vertical levels. Heat can escape through multiple dimensional pathways including upward through the upper encapsulating layer and sideways through laterally extending heat dissipation members, effectively solving the heat dissipation problem in miniaturized devices.
Solution Approach 2:
The heat dissipation system is segmented into multiple independent heat dissipation members positioned at different locations and orientations. Each heat dissipation member independently conducts heat from specific chip regions to external environments, distributing the thermal management load and improving overall heat dissipation efficiency in miniaturized packages.
2Reliability
If heat dissipation structures are added to improve thermal management, then heat dissipation capability increases, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The encapsulating layers (lower encapsulating layer, upper encapsulating layer) serve multiple functions simultaneously: they provide structural encapsulation for the chip structures, facilitate heat dissipation through integrated heat dissipation members, and enable electrical connections through embedded connection bumps and conductive posts. This multi-functionality reduces the need for separate dedicated heat dissipation components, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent merges the encapsulation function and heat dissipation function into a single integrated structure. The heat dissipation members are formed as integral parts of the encapsulating layers, combining what would traditionally be separate components (encapsulation material and heat sink) into one unified element, thus reducing overall structural complexity despite enhanced thermal management capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability and thermal management of semiconductor packages by effectively dissipating heat and maintaining structural stability, thereby supporting the performance and longevity of high-performance chips.
Implementation Method 1
a heat transfer material layer extending through the upper encapsulating layer and the adhesive layer and disposed between the heat dissipation member and the lower chip structure
Implementation Method 2
an adhesive layer on an upper surface of the lower chip structure and fixing the lower chip structure to the upper encapsulating layer
Data Source
AI summary
A semiconductor package includes: a lower redistribution structure including a lower redistribution layer; external connection bumps below the lower redistribution structure; a lower chip structure on the lower redistribution structure; an encapsulant at least partially encapsulating the lower chip structure; an upper encapsulating layer on the encapsulant; an adhesive layer on an upper surface of the lower chip structure; a plurality of posts extending through the encapsulant and electrically connected to the lower redistribution layer; an upper chip structure on the upper encapsulating layer and electrically connected to the plurality of posts; a heat dissipation member on one side of the upper chip structure and overlapping the lower chip structure in a vertical direction; and a heat transfer material layer extending through the upper encapsulating layer and the adhesive layer and disposed between the heat dissipation member and the lower chip structure.