Stacked Semiconductor Package Layout for High-I/O Low-Interference Routing

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Solution Overview

Problem

The challenge is to develop a semiconductor package and stacked package module that supports miniaturization, multifunctionality, and increased capacity in electronic devices while minimizing interference between connection terminals, particularly in a stacked configuration.

Innovation Solution

The semiconductor package includes a lower redistribution layer with multiple ball pad groups, an expanded layer surrounding the semiconductor chip, and an upper redistribution layer with specific electrical connection paths, including dummy ball pads, to facilitate efficient electrical connections and increased bandwidth without significant size or cost increments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of I/O connection terminals is increased to support miniaturization and increased capacity, then bandwidth and capacity are improved, but interference between connection terminals occurs

Engineering Contradiction:
Improvenumber of I/O connection terminalsVSAvoidinterference between connection terminals
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from a two-dimensional planar arrangement of ball pads to a three-dimensional stacked configuration with lower and upper redistribution layers. This vertical dimensionality change allows I/O terminals to be arranged in multiple layers (lower ball pad groups and upper ball pad groups), increasing the number of connection terminals while maintaining adequate spacing to reduce interference between terminals.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the ball pads into multiple groups (lower ball pad groups and upper ball pad groups) separated by the expanded layer and semiconductor chip. This segmentation spatially separates connection terminals into distinct groups, reducing electromagnetic interference between adjacent terminals while enabling increased total terminal count through the stacked architecture.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If a stacked package configuration is used to increase bandwidth and capacity, then performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvebandwidth and capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs dummy ball pads in the upper redistribution layer that serve multiple functions: they maintain structural symmetry for easier manufacturing alignment, provide placeholder positions for future expansion, and enable standardized manufacturing processes across different package configurations. This multi-functionality reduces manufacturing complexity despite the stacked architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses asymmetric configuration where not all upper ball pad groups contain functional ball pads - some are dummy ball pads. This asymmetric design simplifies manufacturing by reducing the number of actual electrical connections required while maintaining the overall symmetric stacked structure for alignment purposes, thereby reducing manufacturing complexity.

Inventive Principle:
Principle #4Asymmetry

3Ease of operation

If dummy ball pads are added to the upper redistribution layer, then electrical connection efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical connection efficiencyVSAvoiddevice complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent creates dummy ball pads as simplified copies of functional ball pads in the upper redistribution layer. These dummy ball pads replicate the physical structure and positioning of real ball pads without requiring full electrical connection functionality, thereby improving electrical connection efficiency through symmetric alignment while adding minimal complexity since they are essentially structural placeholders.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11769762B2Semiconductor package and stacked package module including the same
Publication Date: 2023.09.26 SAMSUNG ELECTRONICS CO LTD
  • US11769762B2 patent drawing
  • US11769762B2 patent drawing
  • US11769762B2 patent drawing

AI summary

A semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. The number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. Each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.