Stacked Substrate Package Layout for Shorter PDN Paths
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Solution Overview
Problem
Current package designs face challenges in improving overall performance, particularly in power distribution network (PDN) efficiency due to the distance between passive components and integrated devices, which affects the yield and cost of substrate fabrication.
Innovation Solution
The design incorporates two substrates with a passive component located between them, utilizing pillar interconnects and solder interconnects to enhance PDN performance, with an encapsulation layer to secure the components, allowing for improved electrical coupling and reduced substrate metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If passive components are placed farther from integrated devices, then substrate fabrication is simpler, but PDN performance deteriorates
Solution Approach 1:
The patent transitions from a planar substrate layout to a three-dimensional stacked architecture where passive components are positioned vertically between substrates. This dimensional change allows passive components to be placed closer to integrated devices in the Z-direction without increasing lateral substrate complexity, thereby improving PDN performance while maintaining fabrication simplicity.
Solution Approach 2:
The patent divides the package into multiple stacked substrates with passive components embedded between them. This segmentation allows the passive components to be positioned optimally close to integrated devices on different substrate layers, improving electrical coupling and PDN performance without requiring a single complex substrate design.
2Reliability
If more metal layers are used in substrate, then PDN performance improves, but manufacturing cost and complexity increase
Solution Approach 1:
The patent utilizes the vertical dimension by stacking multiple substrates with passive components embedded between them. This approach achieves improved PDN performance through better electrical coupling in the Z-direction without increasing the number of metal layers within individual substrate planes, thereby reducing manufacturing complexity and cost.
Solution Approach 2:
The patent introduces passive components as intermediary elements positioned between active devices on different substrates. These passive components serve as electrical mediators that improve PDN performance by reducing inductance and enhancing power delivery, without requiring additional metal layers in the substrates themselves.
3Reliability
If passive components are placed closer to integrated devices, then PDN performance improves, but substrate fabrication difficulty increases
Solution Approach 1:
The patent segments the package into multiple substrates with passive components embedded between them. This segmentation allows passive components to be placed close to integrated devices through vertical stacking rather than lateral placement, avoiding the need for complex single-substrate routing and reducing fabrication difficulty while improving PDN performance.
Solution Approach 2:
The patent employs vertical stacking to position passive components close to integrated devices in the Z-direction. This dimensional approach achieves close proximity for improved PDN performance without requiring complex lateral routing or advanced single-substrate fabrication techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances PDN performance by placing passive components closer to integrated devices, improving yield and reducing costs through lower metal layer counts and efficient substrate fabrication.
Implementation Method 1
The second plurality of pillar interconnects is coupled to the first plurality of pillar interconnects through a plurality of solder interconnects
Data Source
AI summary
A device comprising a first substrate comprising a first plurality of pillar interconnects; a second substrate comprising a second plurality of pillar interconnects, wherein the second plurality of pillar interconnects is coupled to the first plurality of pillar interconnects through a plurality of solder interconnects; a passive component located between the first substrate and the second substrate; and an integrated device coupled to the first substrate.