Stacked Semiconductor Package Layout for Power-Ground Isolation

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Solution Overview

Problem

There is a demand for semiconductor packages that can efficiently integrate multiple semiconductor chips with precise conductive connection structures to manage power, ground, and input/output signals, while maintaining compactness and functionality, as existing solutions struggle to effectively stack and connect chips with varying orientations and signal transmission requirements.

Innovation Solution

A semiconductor package design featuring a base substrate with multiple semiconductor chips stacked vertically, utilizing conductive connection structures with specific pitch intervals and orientations to align power, ground, and input/output connections, including dummy structures for isolation, allowing for efficient signal transmission and compact layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple semiconductor chips are stacked vertically on a base substrate, then the integration density and compactness are improved, but the complexity of aligning and connecting conductive structures between chips increases

Engineering Contradiction:
Improvenumber of integrated chipsVSAvoidcomplexity of conductive connection structures
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The conductive connection structures are segmented into distinct functional types (power connection structures, ground connection structures, and dummy structures) arranged in alternating patterns. This segmentation allows each type to perform its specific function independently while simplifying the overall alignment and connection process between stacked chips.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple layers of semiconductor chips are nested vertically on the base substrate, with each chip layer containing conductive connection structures that align with corresponding structures in adjacent layers. The alternating pattern of power, ground, and dummy structures creates a nested configuration that simplifies inter-layer alignment.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If conductive connection structures are arranged with specific pitch intervals in perpendicular directions, then the signal transmission efficiency is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidpitch interval precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Different regions of the conductive connection structures have different local qualities - power connection structures, ground connection structures, and dummy structures are distributed with specific pitch intervals in first and second perpendicular directions. This local quality variation optimizes signal transmission in different directions while maintaining manageable manufacturing precision through the alternating pattern.

Inventive Principle:
Principle #3Local quality

3Reliability

If dummy structures are positioned between power connection structures in both perpendicular directions, then the electrical isolation and signal integrity are improved, but the area occupied by non-functional structures increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidarea occupied by dummy structures
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

Dummy structures serve as intermediary elements positioned between power connection structures in both first and second perpendicular directions. These dummy structures provide electrical isolation and signal integrity by acting as mediators that prevent unwanted electrical interactions between adjacent power structures, while the alternating pattern minimizes their area occupation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240072007A1Semiconductor package
Publication Date: 2024.02.29 SAMSUNG ELECTRONICS CO LTD
  • US20240072007A1 patent drawing
  • US20240072007A1 patent drawing
  • US20240072007A1 patent drawing

AI summary

A semiconductor package includes a base substrate, a first semiconductor chip mounted on the base substrate, and a second semiconductor chip mounted on the first semiconductor chip. The first semiconductor includes first conductive connection structures that have a first pitch interval in a first direction and a second pitch interval in a second direction, and the second semiconductor chip includes second conductive connection structures that have the first pitch interval in the first direction and the second pitch interval in the second direction. The first conductive connection structures include first power connection structures, first ground connection structures, and first dummy structures. The first ground connection structure or the first dummy structure is between two first power connection structures neighboring in the first direction and between two first power connection structures neighboring in the second direction among the first power connection structures.