Stacked Semiconductor Package Reverse Wire Bonding for Alignment
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Solution Overview
Problem
Existing fan-out packaging technologies face challenges with alignment key issues due to small wire attachment surfaces and smear generation during grinding, leading to increased time and cost in manufacturing multi-stack semiconductor packages.
Innovation Solution
A method involving a reverse wire bonding process is used to form a multi-stack semiconductor package with a conductive bump as an alignment key, eliminating the need for additional processes to create the alignment key, by stacking semiconductor chips with offset positions and forming vertical and reverse wire bonds, followed by molding and processing to expose the conductive bump for alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a wire attachment surface is used as an alignment key, then the alignment process can be performed, but the small area and smear generation make it improper as an alignment key
Solution Approach 1:
The conductive bump is formed on the chip pad before the molding process, serving as a pre-prepared alignment key with sufficient area and uniform shape that will be exposed after molding for subsequent alignment operations
Solution Approach 2:
The conductive bump acts as an intermediary element between the chip pad and the alignment process, providing a dedicated alignment feature that is distinct from the wire attachment surface while maintaining electrical connectivity functionality
2Measurement precision
If a copper pillar bump (CPB) process is applied to generate an alignment key, then the alignment key area is larger and smear risk is reduced, but additional process time and cost are increased
Solution Approach 1:
The alignment key formation is merged with the existing wire bonding process by forming the conductive bump on the chip pad as part of the bonding preparation, eliminating the need for a separate CPB process while achieving similar alignment key benefits
Solution Approach 2:
The conductive bump serves multiple functions: it provides the alignment key for photolithography alignment, maintains electrical connectivity as part of the bonding structure, and can be formed using standard wire bonding equipment rather than requiring specialized CPB process equipment
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time and cost by utilizing a conductive bump as an alignment key, enabling efficient formation of redistribution patterns without additional processes, thereby improving the manufacturing efficiency of semiconductor packages.
Implementation Method 1
bonding one end of a metal wire to a chip pad of a semiconductor chip
Data Source
AI summary
A method of manufacturing a semiconductor package of stacked semiconductor chips includes forming a reverse wire bond by bonding one end of a reverse wire to a chip pad of the second-highest semiconductor chip of the stacked semiconductor chips and connecting the other end of the reverse wire to a conductive bump on a chip pad of the uppermost semiconductor chip of the stacked semiconductor chips. The method also includes molding the stacked semiconductor chips with the reverse wire bond using a mold layer. The method further includes processing the mold layer to expose the conductive bump and the other end of the reverse wire in the reverse wire bond through an upper surface of the mold layer.