Stacked Semiconductor Package with Shared Signal Ball Routing
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Solution Overview
Problem
The increasing demand for reduced semiconductor package size poses a challenge in providing sufficient space for signal balls, which are essential for inputting and outputting electrical signals.
Innovation Solution
The integration of a package substrate with a first and second semiconductor chip, connected via bumps and signal balls, allows for vertical stacking and selective output modes to optimize signal transmission without increasing physical size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are mounted within a single package, then signal transmission capability is improved, but package size increases
Solution Approach 1:
The patent transitions from horizontal arrangement of multiple semiconductor chips to a vertical stacked configuration. The first and second semiconductor chips are arranged in different vertical levels, with the first chip mounted on the package substrate and the second chip mounted on the first chip, thereby utilizing the vertical dimension to increase signal transmission capability without expanding the horizontal package footprint.
Solution Approach 2:
The patent implements a nested stacking structure where the second semiconductor chip is mounted on top of the first semiconductor chip, which itself is mounted on the package substrate. This nested arrangement allows multiple chips to occupy overlapping horizontal space at different vertical levels, effectively increasing functionality while maintaining compact package size.
2Adaptability or versatility
If signal balls are added for each chip, then signal input/output capability is improved, but available space is reduced
Solution Approach 1:
The patent merges the signal ball requirements of multiple chips by having the first and second semiconductor chips share a common signal ball on the package substrate. The first chip connects to the shared signal ball through a first bump, and the second chip connects to the same signal ball through a second bump, thereby reducing the total number of signal balls needed while maintaining full signal I/O capability for both chips.
Solution Approach 2:
The shared signal ball serves multiple functions by receiving signals from both the first and second semiconductor chips through different bumps. This universal signal ball acts as a common interface point, allowing a single signal ball to handle signal transmission for multiple chips, thereby conserving space that would otherwise be required for separate signal balls for each chip.
3Area of stationary object
If chips are stacked vertically, then package size is reduced, but signal interference may occur
Solution Approach 1:
The patent introduces bumps as intermediary connection elements between the semiconductor chips and signal balls. The first bump connects the first chip to the shared signal ball, and the second bump connects the second chip to the same signal ball. These bumps act as isolated connection points that enable signal transmission while preventing direct signal interference between the stacked chips, as each chip's signals are routed through its own dedicated bump to the shared signal ball.
Data Source
AI summary
An integrated circuit chip includes; a package substrate including a first signal ball, a first semiconductor chip on the package substrate, a second semiconductor chip on the first semiconductor chip, a first bump disposed between the package substrate and the first semiconductor chip and electrically connected to the first signal ball, and a second bump disposed between the first semiconductor chip and the second semiconductor chip and electrically connected to the first signal ball, wherein during a first mode, the first signal ball receives a signal from the first semiconductor chip through the first bump and receives a signal from the second semiconductor chip through the second bump.