Stacked Semiconductor Package for Shorter Signal Paths and Cooling
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Solution Overview
Problem
The increasing complexity and performance of semiconductor packages lead to challenges in heat dissipation and signal transmission efficiency, particularly in compact designs where traditional methods may hinder performance and reliability.
Innovation Solution
A semiconductor package design featuring a stacked chip structure with redistribution substrates and a heat dissipation structure, where the second semiconductor chip is directly mounted on the second redistribution substrate, and the memory device exchanges signals directly with the second semiconductor chip without passing through the first redistribution substrate, minimizing signal path length and enhancing heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If signals pass through the first redistribution substrate to exchange between memory device and second semiconductor chip, then connectivity is achieved, but signal transmission efficiency deteriorates due to increased path length
Solution Approach 1:
The patent transitions from a planar signal routing approach to a three-dimensional stacked architecture. The memory device and second semiconductor chip are positioned in different vertical layers, enabling direct lateral signal exchange within the second redistribution substrate without traversing the first redistribution substrate. This dimensional reorganization dramatically shortens the signal path and eliminates unnecessary routing through intermediate substrates.
2Temperature
If traditional semiconductor package architecture is used, then manufacturing is simplified, but heat dissipation performance deteriorates in compact designs
Solution Approach 1:
The patent divides the semiconductor package into distinct functional layers: first redistribution substrate layer, second semiconductor chip layer, and memory device layer. Each layer is independently optimized for its specific function, with the heat dissipation structure dedicated solely to thermal management. This segmentation allows the heat dissipation structure to be strategically positioned adjacent to high-heat-generating components without complicating the overall manufacturing process.
Solution Approach 2:
The second redistribution substrate serves as an intermediary structure that simultaneously provides electrical connectivity and mechanical support for the heat dissipation structure. This intermediate layer enables the heat dissipation structure to be effectively coupled to the second semiconductor chip while maintaining signal integrity and structural stability, resolving the conflict between thermal management requirements and manufacturing simplicity.
3Area of stationary object
If second semiconductor chip is mounted on first semiconductor chip, then space is utilized, but heat dissipation becomes more difficult
Solution Approach 1:
The patent employs a three-dimensional stacked configuration where the second semiconductor chip and memory device are positioned in the vertical dimension rather than occupying horizontal space. This allows the first semiconductor chip to maintain its position on the first redistribution substrate while the second semiconductor chip is mounted above it, creating a layered structure that improves heat dissipation by separating heat-generating components into different vertical zones with dedicated heat dissipation pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves heat dissipation and signal transmission efficiency, reducing power consumption and increasing performance by minimizing signal path length and optimizing heat dissipation, thus addressing the limitations of traditional semiconductor package architectures.
Implementation Method 1
a heat dissipation structure on the second semiconductor chip
Data Source
Figure 1
Figure 2
Figure 3A
AI summary
A semiconductor package includes a first redistribution substrate; a first semiconductor chip on the first redistribution substrate; a second redistribution substrate on the first semiconductor chip; inter-substrate through-electrodes on the first redistribution substrate at one side of the first semiconductor chip and connecting the first redistribution substrate to the second redistribution substrate; a second semiconductor chip on the first semiconductor chip; and a heat dissipation structure on the second semiconductor chip.