Stacked Electronic Package Layout for Smaller Substrate Footprint

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing side-by-side package structure in semiconductor packaging faces challenges of increased size and cost due to the use of larger solder balls and dispersed signal pins, which are not suitable for future high-performance, compact electronic devices.

Innovation Solution

The electronic package employs smaller bonding wires and a novel encapsulation method to reduce substrate size, incorporates a heat dissipation member for efficient cooling, and utilizes an adhesion layer to shield against electromagnetic interference, while using an interposer to prevent solder ball contamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If larger solder balls are used to connect substrates in side-by-side package structure, then connection reliability is improved, but package size and cost increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from planar side-by-side arrangement to three-dimensional stacked arrangement, connecting substrates in the vertical direction (Z-axis) rather than horizontal direction. This dimensional change allows high-density interconnection without increasing package footprint, as signals are routed through vertical vias and interposer layers rather than requiring large horizontal solder ball arrays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the first substrate is positioned on the first surface of the circuit board, the second substrate is positioned on the second surface of the circuit board, and an interposer is embedded within the encapsulant material between the substrates. This nested arrangement allows multiple functional layers to be integrated within a compact vertical space, achieving high connection density without increasing package area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If dispersed signal pins are used for high-performance connections, then electrical performance is improved, but substrate size and manufacturing cost increase

Engineering Contradiction:
Improveelectrical performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The interposer serves multiple functions simultaneously: it provides high-density signal interconnection between substrates, acts as a mechanical support structure, enables vertical signal routing through embedded vias, and facilitates heat dissipation pathways. This multi-functionality eliminates the need for separate dedicated interconnection structures, reducing overall manufacturing complexity and cost while maintaining high electrical performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The interposer acts as an intermediary component between the first and second substrates, providing a controlled impedance signal path with embedded conductive vias. This intermediary structure enables high-speed signal transmission by controlling signal integrity, reducing crosstalk, and providing consistent electrical characteristics, while the standardized interposer fabrication process keeps manufacturing costs manageable.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If stacked package structure is used to increase integration density, then electrical performance is improved, but heat dissipation becomes more difficult

Engineering Contradiction:
Improveelectrical performanceVSAvoidheat dissipation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The encapsulant material serves dual purposes: it provides mechanical protection and structural support for the stacked package, while simultaneously functioning as a thermal management medium. The encapsulant is configured to conduct heat away from active components through its inherent thermal conductivity, and its extended surface area in contact with substrates creates efficient heat dissipation pathways without requiring additional active cooling components.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs composite material structures including the interposer with embedded conductive vias filled with high thermal conductivity material, and the encapsulant material that may contain thermally conductive fillers. This composite approach creates a multi-phase thermal management system where different materials are optimized for specific thermal pathways, enabling effective heat dissipation from high-power devices in the stacked configuration.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the overall size and cost of the package by minimizing substrate dimensions, enhances heat dissipation, and shields against interference, making it suitable for high-performance, compact electronic devices.

Implementation Method 1

a plurality of bonding wires are formed on the first side of the first substrate for electrically connecting the first substrate to the circuit board

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

a first encapsulant formed on the first surface of the circuit board to encapsulate the first substrate, the first electronic component and the plurality of bonding wires

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Implementation Method 3

utilizes an adhesion layer to shield against electromagnetic interference

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Implementation Method 4

incorporates a heat dissipation member for efficient cooling

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20260053064A1Electronic package and manufacturing method thereof
Publication Date: 2026.02.19 SILICONWARE PRECISION IND CO LTD
  • US20260053064A1 patent drawing
  • US20260053064A1 patent drawing
  • US20260053064A1 patent drawing

AI summary

An electronic package and a manufacturing method thereof are provided, including a first electronic component disposed on a first side of a first substrate disposed on a first surface of a circuit board, a plurality of bonding wires formed on the first side of the first substrate for electrically connecting the first substrate to the circuit board. A second electronic component is disposed on the first surface of the circuit board for the first electronic component to be electrically connected to the second electronic component via the first substrate, the plurality of bonding wires and the circuit board in sequence. A first encapsulant is formed on the first surface of the circuit board to cover the first substrate, the first electronic component and the plurality of bonding wires. Thereby, the present disclosure can effectively reduce the size of the first substrate and the electronic package.