Stacked Semiconductor Package Layout for High-I/O Terminal Routing
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Solution Overview
Problem
The challenge is to develop a semiconductor package and stacked package module that supports miniaturization, multifunctionality, and increased capacity in electronic devices while managing interference between connection terminals effectively.
Innovation Solution
The semiconductor package includes a lower redistribution layer with multiple ball pad groups, an expanded layer surrounding the semiconductor chip, and an upper redistribution layer with specific electrical connection paths, including dummy ball pads to manage terminal connections and increase bandwidth without increasing package size or manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of I/O connection terminals is increased to support miniaturization and multifunctionality, then the capacity and bandwidth of electronic devices are improved, but interference between connection terminals occurs and manufacturing complexity increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of ball pads to a three-dimensional stacked configuration with lower and upper redistribution layers. This vertical dimensionality change allows I/O terminals to be arranged in multiple layers, increasing the effective number of connections while maintaining adequate spacing to reduce interference between terminals.
Solution Approach 2:
The patent divides the ball pads into multiple groups (first through fourth lower ball pad groups and corresponding upper groups) distributed across different redistribution layers. This segmentation allows independent routing and electrical connection management for each group, reducing signal interference while enabling a higher total number of I/O terminals.
2Quantity of substance
If dummy ball pads are added to increase bandwidth without increasing package size, then capacity is improved, but device complexity increases
Solution Approach 1:
The dummy ball pads are integrated into the existing upper redistribution layer structure and follow the same grouping pattern as functional ball pads. They share the same manufacturing process, material composition, and physical arrangement principles, allowing the package structure to handle both functional and dummy pads uniformly without requiring additional complexity.
3Object-affected harmful factors
If multiple redistribution layers are implemented to manage terminal connections, then interference is reduced, but manufacturing complexity increases
Solution Approach 1:
The lower redistribution layer with its grouped ball pad configuration is formed first, establishing the foundation for subsequent layer alignment. This preliminary structuring enables precise registration of the upper redistribution layer during stacking, simplifying the manufacturing process by providing clear alignment references before final assembly.
Data Source
AI summary
A semiconductor package includes a lower redistribution layer having a plurality of lower ball pads forming a plurality of lower ball pad groups, a semiconductor chip on the lower redistribution layer, an expanded layer surrounding the semiconductor chip on the lower redistribution layer, and an upper redistribution layer on the semiconductor chip and the expanded layer and having a plurality of upper ball pads forming a plurality of upper ball pad groups. The number of the plurality of upper ball pad groups may be the same as the number of the of the plurality lower ball pad groups. Each of the upper ball pads in one of the plurality of upper ball pad groups, from among the plurality of upper ball pads, may be a dummy ball pad.