Stacked Semiconductor Package Layout for Thin Thermal Dissipation
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Solution Overview
Problem
Semiconductor packages face challenges in minimizing thickness while maximizing heat dissipation and maintaining high performance and reliability, especially as they become smaller and more compact, leading to increased power consumption and thermal management issues.
Innovation Solution
A semiconductor package design that includes a redistribution substrate with a heat dissipation chip stacked on a semiconductor chip through a metal pad and adhesive layer, and a second semiconductor chip mounted adjacent to the heat dissipation chip on through-posts, along with a sealing material that minimizes thickness and enhances heat dissipation by exposing the upper surface of the semiconductor chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the semiconductor package is made smaller and more compact, then the size and weight are reduced, but the heat dissipation becomes more difficult and power consumption increases
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional heat dissipation by stacking multiple semiconductor chips vertically. The first semiconductor chip is mounted on the redistribution substrate, and the second semiconductor chip is mounted on the first semiconductor chip, creating a vertical arrangement that enables heat dissipation in the thickness direction while maintaining a compact footprint.
Solution Approach 2:
The patent divides the heat dissipation function into separate components: the first semiconductor chip, the second semiconductor chip, and the redistribution substrate with through-posts. Each chip can be independently optimized for heat dissipation, and the through-posts provide dedicated thermal pathways that segment the heat flow from the mounting substrate, improving overall thermal management.
2Length of stationary object
If the total thickness of the semiconductor package is minimized, then the package becomes more compact, but the heat dissipation efficiency is reduced
Solution Approach 1:
The patent applies local quality by providing through-posts only in specific regions where heat dissipation is most critical, rather than uniformly throughout the entire substrate. The through-posts are strategically positioned to create localized high-performance thermal pathways, allowing the majority of the package to maintain minimal thickness while critical areas achieve superior heat dissipation.
3Productivity
If multiple semiconductor chips are stacked vertically, then the package density increases, but the alignment precision and warpage control become more difficult
Solution Approach 1:
The patent implements preliminary action by forming alignment marks and alignment protrusions on the redistribution substrate before mounting the semiconductor chips. The through-posts include protrusions that extend toward the chips, and the mounting process utilizes these pre-formed features to automatically align chips with through-posts, ensuring precise positioning without requiring complex real-time adjustment mechanisms.
4Length of stationary object
If the sealing material is made thinner to reduce package thickness, then the package becomes more compact, but the structural strength and warpage resistance are reduced
Solution Approach 1:
The patent employs composite materials by combining the sealing material with through-posts that extend through it. The through-posts act as structural reinforcement within the sealing material, creating a composite structure that maintains structural strength and warpage resistance even when the sealing material itself is made thin. This allows the package to achieve minimal thickness while preserving mechanical integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the total thickness of the semiconductor package, improves heat dissipation efficiency, and controls warpage, while maintaining high performance and reliability by utilizing a thin sealing material and strategically placing heat dissipation components.
Implementation Method 1
a metal pad and an adhesive layer are provided between the heat dissipation chip and the first semiconductor chip
Implementation Method 2
a through-post provided on the redistribution substrate in a region adjacent to a left side, in the first direction, of the first semiconductor chip
Data Source
AI summary
A semiconductor package is provided. The semiconductor package includes: a redistribution substrate; a first semiconductor chip provided on a right portion, in a first direction, of the redistribution substrate; a through-post provided on the redistribution substrate in a region adjacent to a left side, in the first direction, of the first semiconductor chip; a heat dissipation chip provided on the first semiconductor chip; and a second semiconductor device provided adjacent to the heat dissipation chip on the through-post. A metal pad and an adhesive layer are provided between the heat dissipation chip and the first semiconductor chip.