Stacked Semiconductor Package Dam Structure for Underfill Control
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Solution Overview
Problem
The challenge lies in miniaturizing and reducing the weight of semiconductor packages while ensuring high performance and large capacity, particularly in stacking semiconductor chips where existing technologies struggle with uniform underfill material distribution and thermal expansion mismatches, leading to potential warpage and reliability issues.
Innovation Solution
The proposed semiconductor package incorporates an underfill material layer with a dam structure that includes unit dam structures with slits, preventing underfill material overflow and ensuring uniform distribution, and a molding layer to cover the underfill material and dam structure, thereby controlling the shape and preventing warpage due to thermal expansion mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor chips are stacked to miniaturize and reduce weight, then device size and weight are reduced, but uniform underfill material distribution becomes difficult to achieve
Solution Approach 1:
The dam structure is divided into multiple unit dam structures arranged in an array with slits between them. This segmentation allows the underfill material to be uniformly distributed through the slits while preventing overflow, solving the contradiction between miniaturization and manufacturing precision.
Solution Approach 2:
The underfill material layer acts as an intermediary substance that fills the gaps between stacked semiconductor chips. The dam structure with slits controls the flow of this intermediary material, ensuring uniform distribution while enabling chip stacking for miniaturization.
2Reliability
If underfill material is used to bond stacked chips, then structural reliability is improved, but thermal expansion mismatches cause warpage
Solution Approach 1:
The vertical level of the dam structure's upper surface is positioned between the lower surface and upper surface of the second semiconductor chip. This parameter adjustment allows the dam structure to effectively control underfill material distribution while accommodating thermal expansion differences, preventing warpage.
Solution Approach 2:
The dam structure is designed with unit dam structures and slits to preemptively control underfill material flow before thermal expansion mismatches can cause warpage. This preliminary control prevents the harmful effect of warpage while maintaining structural reliability.
3Manufacturing precision
If a continuous dam structure is used to prevent underfill overflow, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The dam structure is segmented into multiple unit dam structures with slits between them. This segmentation maintains the effectiveness of preventing underfill overflow while reducing the overall complexity compared to a continuous dam structure, as the segmented design is easier to manufacture and integrate.
Data Source
AI summary
A semiconductor package includes: a first semiconductor chip; a second semiconductor chip stacked on the first semiconductor chip; an underfill material layer interposed between the first semiconductor chip and the second semiconductor chip; and a first dam structure disposed on the first semiconductor chip. The first dam structure extends along an edge of the second semiconductor chip and includes unit dam structures apart from each other with a slit therebetween. A vertical level of an upper surface of the first dam structure is located between a vertical level of a lower surface of the second semiconductor chip and a vertical level of an upper surface of the second semiconductor chip. A first sidewall of the first dam structure is in contact with the underfill material layer and includes a flat surface parallel to a sidewall of the second semiconductor chip that faces the first sidewall of the first dam structure.