Stacked Semiconductor Package Void Control for Reliable Bonding
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Solution Overview
Problem
Existing semiconductor packages face challenges in achieving high integration and reliability with stacked semiconductor chips due to bonding defects and voids during the stacking process.
Innovation Solution
A semiconductor package design incorporating bonding pads, bonding insulating layers, and void controllers, including cavities filled with gas, to enhance electrical connectivity and reduce bonding defects by controlling void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If semiconductor chips are stacked through wafer-to-wafer bonding to achieve high integration, then the integration density and size reduction are improved, but bonding defects and voids occur during the stacking process
Solution Approach 1:
The patent introduces a void controller structure before the bonding process to prevent void formation during wafer-to-wafer bonding. The protrusion structure is prepared in advance on one wafer surface, and the recess structure is prepared on the opposing wafer surface, so that when bonding occurs, the protrusion fills the recess to eliminate voids and improve bonding quality
Solution Approach 2:
The void controller acts as an intermediary structure between the two bonding surfaces. The protrusion structure extends into the recess structure, serving as a mediator that facilitates proper contact and eliminates voids during the bonding process, thereby improving bonding quality without compromising integration density
2Reliability
If bonding pads are directly connected to semiconductor chips to improve electrical connectivity, then the electrical connection is improved, but voids and bonding defects occur during stacking
Solution Approach 1:
The void controller structure is prepared in advance on the wafer surface before bonding pads are formed or before the bonding process. The protrusion structure is created to extend toward the opposing wafer, and the recess structure is prepared to receive it, ensuring that when bonding occurs, the void controller prevents void formation that would otherwise occur around the bonding pads
Solution Approach 2:
The patent converts the potential harm of void formation into a benefit by designing the void controller to actively prevent voids. The protrusion structure, which could be seen as an additional complexity, actually serves to fill voids and improve bonding quality, thereby converting a potential manufacturing challenge into a quality improvement mechanism
Data Source
AI summary
A semiconductor package includes: a plurality of semiconductor chips; a plurality of bonding pads between two of the plurality of semiconductor chips; a bonding insulating layer surrounding the plurality of bonding pads between the two of the plurality of semiconductor chips; and a void controller between the plurality of bonding pads, wherein the plurality of bonding pads are directly connected to the two of the plurality of semiconductor chips, wherein the bonding insulating layer is directly connected to the two of the plurality of semiconductor chips, wherein the void controller is a cavity defined by the bonding insulating layer, one of the plurality of semiconductor chips, and the bonding insulating layer, or the one of the plurality of semiconductor chips and the bonding insulating layer, and wherein the void controller is filled with a gas.